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Message-ID: <4c1c4fe8-9412-2543-e9bc-83b7e5d7c202@c-s.fr>
Date: Tue, 30 Apr 2019 19:19:07 +0200
From: Christophe Leroy <christophe.leroy@....fr>
To: Rasmus Villemoes <rasmus.villemoes@...vas.dk>,
Qiang Zhao <qiang.zhao@....com>, Li Yang <leoyang.li@....com>
Cc: Valentin Longchamp <valentin.longchamp@...mile.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Scott Wood <oss@...error.net>,
Rasmus Villemoes <Rasmus.Villemoes@...vas.se>,
Rob Herring <robh+dt@...nel.org>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 4/5] soc/fsl/qe: qe.c: support fsl,qe-snums property
Le 30/04/2019 à 15:36, Rasmus Villemoes a écrit :
> The current code assumes that the set of snum _values_ to populate the
> snums[] array with is a function of the _number_ of snums
> alone. However, reading table 4-30, and its footnotes, of the QUICC
> Engine Block Reference Manual shows that that is a bit too naive.
>
> As an alternative, this introduces a new binding fsl,qe-snums, which
> automatically encodes both the number of snums and the actual values to
> use. Conveniently, of_property_read_variable_u8_array does exactly
> what we need.
>
> For example, for the MPC8309, one would specify the property as
>
> fsl,qe-snums = /bits/ 8 <
> 0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9
> 0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>;
>
> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@...vas.dk>
> ---
> .../devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++++++-
> drivers/soc/fsl/qe/qe.c | 14 +++++++++++++-
> 2 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
> index d7afaff5faff..05f5f485562a 100644
> --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
> +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
> @@ -18,7 +18,8 @@ Required properties:
> - reg : offset and length of the device registers.
> - bus-frequency : the clock frequency for QUICC Engine.
> - fsl,qe-num-riscs: define how many RISC engines the QE has.
> -- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use for the
> +- fsl,qe-snums: This property has to be specified as '/bits/ 8' value,
> + defining the array of serial number (SNUM) values for the virtual
> threads.
>
> Optional properties:
> @@ -34,6 +35,11 @@ Recommended properties
> - brg-frequency : the internal clock source frequency for baud-rate
> generators in Hz.
>
> +Deprecated properties
> +- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use
> + for the threads. Use fsl,qe-snums instead to not only specify the
> + number of snums, but also their values.
> +
> Example:
> qe@...00000 {
> #address-cells = <1>;
> diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
> index aff9d1373529..af3c2b2b268f 100644
> --- a/drivers/soc/fsl/qe/qe.c
> +++ b/drivers/soc/fsl/qe/qe.c
> @@ -283,7 +283,6 @@ EXPORT_SYMBOL(qe_clock_source);
> */
> static void qe_snums_init(void)
> {
> - int i;
Why do you move this one ?
> static const u8 snum_init_76[] = {
> 0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,
> 0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,
> @@ -304,9 +303,22 @@ static void qe_snums_init(void)
> 0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59,
> 0x68, 0x69, 0x78, 0x79, 0x80, 0x81,
> };
> + struct device_node *qe;
> const u8 *snum_init;
> + int i;
>
> bitmap_zero(snum_state, QE_NUM_OF_SNUM);
> + qe = qe_get_device_node();
> + if (qe) {
> + i = of_property_read_variable_u8_array(qe, "fsl,qe-snums",
> + snums, 1, QE_NUM_OF_SNUM);
> + of_node_put(qe);
> + if (i > 0) {
> + qe_num_of_snum = i;
> + return;
In that case you skip the rest of the init ? Can you explain ?
Christophe
> + }
> + }
> +
> qe_num_of_snum = qe_get_num_of_snums();
>
> if (qe_num_of_snum == 76)
>
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