[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20190501092841.9026-5-rasmus.villemoes@prevas.dk>
Date: Wed, 1 May 2019 09:29:08 +0000
From: Rasmus Villemoes <rasmus.villemoes@...vas.dk>
To: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Qiang Zhao <qiang.zhao@....com>, Li Yang <leoyang.li@....com>
CC: "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
Scott Wood <oss@...error.net>,
Christophe Leroy <christophe.leroy@....fr>,
Mark Rutland <mark.rutland@....com>,
Rasmus Villemoes <Rasmus.Villemoes@...vas.se>
Subject: [PATCH v2 4/6] dt-bindings: soc/fsl: qe: document new fsl,qe-snums
binding
Reading table 4-30, and its footnotes, of the QUICC Engine Block
Reference Manual shows that the set of snum _values_ is not
necessarily just a function of the _number_ of snums, as given in the
fsl,qe-num-snums property.
As an alternative, to make it easier to add support for other variants
of the QUICC engine IP, this introduces a new binding fsl,qe-snums,
which automatically encodes both the number of snums and the actual
values to use.
For example, for the MPC8309, one would specify the property as
fsl,qe-snums = /bits/ 8 <
0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9
0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>;
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@...vas.dk>
---
Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
index d7afaff5faff..05f5f485562a 100644
--- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
@@ -18,7 +18,8 @@ Required properties:
- reg : offset and length of the device registers.
- bus-frequency : the clock frequency for QUICC Engine.
- fsl,qe-num-riscs: define how many RISC engines the QE has.
-- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use for the
+- fsl,qe-snums: This property has to be specified as '/bits/ 8' value,
+ defining the array of serial number (SNUM) values for the virtual
threads.
Optional properties:
@@ -34,6 +35,11 @@ Recommended properties
- brg-frequency : the internal clock source frequency for baud-rate
generators in Hz.
+Deprecated properties
+- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use
+ for the threads. Use fsl,qe-snums instead to not only specify the
+ number of snums, but also their values.
+
Example:
qe@...00000 {
#address-cells = <1>;
--
2.20.1
Powered by blists - more mailing lists