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Message-ID: <20190501210048.GA20658@bogus>
Date: Wed, 1 May 2019 16:00:48 -0500
From: Rob Herring <robh@...nel.org>
To: Rasmus Villemoes <rasmus.villemoes@...vas.dk>
Cc: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Qiang Zhao <qiang.zhao@....com>, Li Yang <leoyang.li@....com>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Scott Wood <oss@...error.net>,
Christophe Leroy <christophe.leroy@....fr>,
Mark Rutland <mark.rutland@....com>,
Rasmus Villemoes <Rasmus.Villemoes@...vas.se>
Subject: Re: [PATCH v2 4/6] dt-bindings: soc/fsl: qe: document new
fsl,qe-snums binding
On Wed, 1 May 2019 09:29:08 +0000, Rasmus Villemoes wrote:
> Reading table 4-30, and its footnotes, of the QUICC Engine Block
> Reference Manual shows that the set of snum _values_ is not
> necessarily just a function of the _number_ of snums, as given in the
> fsl,qe-num-snums property.
>
> As an alternative, to make it easier to add support for other variants
> of the QUICC engine IP, this introduces a new binding fsl,qe-snums,
> which automatically encodes both the number of snums and the actual
> values to use.
>
> For example, for the MPC8309, one would specify the property as
>
> fsl,qe-snums = /bits/ 8 <
> 0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9
> 0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>;
>
> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@...vas.dk>
> ---
> Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@...nel.org>
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