lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAOeoa-d4tC9VYR_O_Nfrx=hm1Xi4JpsLEDWCibv39CGxsSFt=Q@mail.gmail.com>
Date:   Thu, 9 May 2019 08:39:10 -0700
From:   Kristian Høgsberg <hoegsberg@...il.com>
To:     Jordan Crouse <jcrouse@...eaurora.org>
Cc:     freedreno@...ts.freedesktop.org, David Airlie <airlied@...ux.ie>,
        linux-arm-msm@...r.kernel.org, LKML <linux-kernel@...r.kernel.org>,
        dri-devel <dri-devel@...ts.freedesktop.org>,
        Rob Clark <robdclark@...il.com>,
        Daniel Vetter <daniel@...ll.ch>, Sean Paul <sean@...rly.run>
Subject: Re: [Freedreno] [PATCH v1 2/3] drm/msm: Print all 64 bits of the
 faulting IOMMU address

On Tue, May 7, 2019 at 11:02 AM Jordan Crouse <jcrouse@...eaurora.org> wrote:
>
> When we move to 64 bit addressing for a5xx and a6xx targets we will start
> seeing pagefaults at larger addresses so format them appropriately in the
> log message for easier debugging.

Yes please, this has confused me more than once.

Reviewed-by: Kristian H. Kristensen <hoegsberg@...gle.com>

> Signed-off-by: Jordan Crouse <jcrouse@...eaurora.org>
> ---
>
>  drivers/gpu/drm/msm/msm_iommu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
> index 12bb54c..1926329 100644
> --- a/drivers/gpu/drm/msm/msm_iommu.c
> +++ b/drivers/gpu/drm/msm/msm_iommu.c
> @@ -30,7 +30,7 @@ static int msm_fault_handler(struct iommu_domain *domain, struct device *dev,
>         struct msm_iommu *iommu = arg;
>         if (iommu->base.handler)
>                 return iommu->base.handler(iommu->base.arg, iova, flags);
> -       pr_warn_ratelimited("*** fault: iova=%08lx, flags=%d\n", iova, flags);
> +       pr_warn_ratelimited("*** fault: iova=%16lx, flags=%d\n", iova, flags);
>         return 0;
>  }
>
> --
> 2.7.4
>
> _______________________________________________
> Freedreno mailing list
> Freedreno@...ts.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/freedreno

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ