linux-kernel - Re: [PATCH] media: i2c: adv748x: initialize bit 7 of csi_tx_top_reg

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Message-ID: <26e001a0-298f-e23b-9e46-98e62a8399c2@ideasonboard.com>
Date:   Fri, 10 May 2019 17:25:24 +0100
From:   Kieran Bingham <kieran.bingham@...asonboard.com>
To:     Michael Rodin <mrodin@...adit-jv.com>, mchehab@...nel.org,
        linux-media@...r.kernel.org
Cc:     linux-kernel@...r.kernel.org, michael@...in.online,
        Niklas Söderlund <niklas.soderlund@...natech.se>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>
Subject: Re: [PATCH] media: i2c: adv748x: initialize bit 7 of
 csi_tx_top_reg_1f

Hi Michael,

Thank you for the patch,

Could the patch title be a bit better described? Perhaps:

media: i2c: adv748x: Correct EAV F-bit handling


On 10/05/2019 16:30, Michael Rodin wrote:
> According to pages 188 and 193 of the "UG-747: ADV7481 Reference Manual"
> [1], the bit 7 (FRAMENUMBER_INTERLACED) of the register csi_tx_top_reg_1f
> "sets association of frame number in the FS and FE packets with the F bit
> in the EAV/SAV codes". EAV/SAV codes are defined in [2].
> According to [2]:

Could you detail where this reference is to help searching for it
please? (it looks like Table 2, page 5)

> F=0 for field 1
> F=1 for field 2

It would help to indent those lines to make the whole text a bit more
readable...

> The bit FRAMENUMBER_INTERLACED is not initialized anywhere in the current
> version of the adv748x driver and therefore it is always 0, which is the
> default value according to [1]. Therefore the current association of field
> number from EAV/SAV code with the frame number in CSI FS and FE packets is:
> field 1 (top field for PAL, bottom field for NTSC) -> CSI frame number 2
> field 2 (bottom field for PAL, top field for NTSC) -> CSI frame number 1
> But this breaks frame number based field detection of top/bottom fields
> in CSI receivers. Therefore it makes sense to initialize the
> FRAMENUMBER_INTERLACED bit to 1 so the association is as expected:
> field 1 -> frame number 1
> field 2 -> frame number 2

I'm a bit worried by this patch, as it implies that we would have had
our fields inverted in our testing, or if they are not - then applying
this patch will then invert them! So either way we need to check this
carefully.

I can see the EAV:F values match the description above in the document...

Niklas, how does RCar-CSI determine the top/bottom sequence?

Do we have field inversion currently? (or one which is perhaps swapped
somewhere along the pipeline in rcar-vin?)


> [1] https://www.analog.com/en/products/adv7481.html
> [2] https://www.itu.int/rec/R-REC-BT.656-5-200712-I/en
> 
> Suggested-by: Steve Longerbeam <steve_longerbeam@...tor.com>
> Signed-off-by: Michael Rodin <mrodin@...adit-jv.com>
> ---
>  drivers/media/i2c/adv748x/adv748x-core.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/media/i2c/adv748x/adv748x-core.c b/drivers/media/i2c/adv748x/adv748x-core.c
> index f57cd77..4dd1a13 100644
> --- a/drivers/media/i2c/adv748x/adv748x-core.c
> +++ b/drivers/media/i2c/adv748x/adv748x-core.c
> @@ -278,6 +278,9 @@ static int adv748x_power_up_tx(struct adv748x_csi2 *tx)
>  	usleep_range(1000, 1500);
>  	adv748x_write_check(state, page, 0x31, 0x80, &ret);
>  
> +	/* set bit 7 (FRAMENUMBER_INTERLACED) in csi_tx_top_reg_1f */
> +	adv748x_write_check(state, page, 0x1f, 0x80, &ret);

I think it would be nice to store the bit as macro defines in
drivers/media/i2c/adv748x/adv748x.h

I appreciate that the rest of this function does not (yet) do that
however, (it has been derived from a table of ADI required writes) - but
I think now that it is split from a table to a function it could be nice
to clean up the 'magic numbers' along the way.

Of course if you have time to convert the rest of the function as well
(in a separate patch) that might be a nice cleanup, but not required.

> +
>  	return ret;
>  }
>  
> 

-- 
Regards
--
Kieran