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Date:   Mon, 13 May 2019 09:15:05 -0300
From:   Fabio Estevam <festevam@...il.com>
To:     Andrey Smirnov <andrew.smirnov@...il.com>
Cc:     Shawn Guo <shawnguo@...nel.org>, Chris Healy <cphealy@...il.com>,
        Andrew Lunn <andrew@...n.ch>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] ARM: dts: vf610-zii-dev: Add QSPI node

Hi Andrey,

On Mon, May 13, 2019 at 12:59 AM Andrey Smirnov
<andrew.smirnov@...il.com> wrote:

> +&qspi0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_qspi0>;
> +       status = "okay";
> +
> +       /*
> +        * Attached MT25QL02 can go up to 90Mhz in DTR and 166 in SDR
> +        * modes, so we limit spi-max-frequency to 90Mhz

Nit: It is MHz, not Mhz.

MT25QL02 datasheet refers to DTR and STR (not SDR).

Also, the public datasheet I can see online lists these limits differently:

"• Clock frequency – 133 MHz (MAX) for all protocols in STR – 66 MHz
(MAX) for all protocols in DTR"

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