[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAHQ1cqFK=ro++GtTOisQtgSqHm4jNdSCfMDbHXaOVcbMj5eX6A@mail.gmail.com>
Date: Mon, 13 May 2019 12:58:10 -0700
From: Andrey Smirnov <andrew.smirnov@...il.com>
To: Fabio Estevam <festevam@...il.com>
Cc: Shawn Guo <shawnguo@...nel.org>, Chris Healy <cphealy@...il.com>,
Andrew Lunn <andrew@...n.ch>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] ARM: dts: vf610-zii-dev: Add QSPI node
On Mon, May 13, 2019 at 5:15 AM Fabio Estevam <festevam@...il.com> wrote:
>
> Hi Andrey,
>
> On Mon, May 13, 2019 at 12:59 AM Andrey Smirnov
> <andrew.smirnov@...il.com> wrote:
>
> > +&qspi0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_qspi0>;
> > + status = "okay";
> > +
> > + /*
> > + * Attached MT25QL02 can go up to 90Mhz in DTR and 166 in SDR
> > + * modes, so we limit spi-max-frequency to 90Mhz
>
> Nit: It is MHz, not Mhz.
>
> MT25QL02 datasheet refers to DTR and STR (not SDR).
>
Sure, will fix.
> Also, the public datasheet I can see online lists these limits differently:
>
> "• Clock frequency – 133 MHz (MAX) for all protocols in STR – 66 MHz
> (MAX) for all protocols in DTR"
Here's the datasheet I got those numbers from:
https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_u_02g_cbb_0.pdf
Thanks,
Andrey Smirnov
Powered by blists - more mailing lists