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Message-ID: <CAL_JsqLEw+HAeqd2TD33cSVBjwDUNMb5amk2wGsW9m_4Z6CucQ@mail.gmail.com>
Date:   Mon, 13 May 2019 10:20:50 -0500
From:   Rob Herring <robh@...nel.org>
To:     Vidya Sagar <vidyas@...dia.com>
Cc:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Mark Rutland <mark.rutland@....com>,
        Thierry Reding <thierry.reding@...il.com>,
        Jon Hunter <jonathanh@...dia.com>,
        Kishon Vijay Abraham I <kishon@...com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        Jingoo Han <jingoohan1@...il.com>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Mikko Perttunen <mperttunen@...dia.com>,
        linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-tegra@...r.kernel.org,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>, kthota@...dia.com,
        Manikanta Maddireddy <mmaddireddy@...dia.com>,
        sagar.tv@...il.com
Subject: Re: [PATCH V5 10/16] dt-bindings: PCI: tegra: Add device tree support
 for T194

On Tue, May 7, 2019 at 4:20 AM Vidya Sagar <vidyas@...dia.com> wrote:
>
> On 4/26/2019 9:13 PM, Rob Herring wrote:
> > On Wed, Apr 24, 2019 at 10:49:58AM +0530, Vidya Sagar wrote:
> >> Add support for Tegra194 PCIe controllers. These controllers are based
> >> on Synopsys DesignWare core IP.
> >>
> >> Signed-off-by: Vidya Sagar <vidyas@...dia.com>
> >> ---

> >> +- nvidia,bpmp: Must contain a phandle to BPMP controller node.
> >> +- nvidia,controller-id : Controller specific ID
> >> +    0: C0
> >> +    1: C1
> >> +    2: C2
> >> +    3: C3
> >> +    4: C4
> >> +    5: C5
> >
> > We don't normal put device indexes into DT. Why do you need this.
> > Perhaps for accessing the BPMP? If so, make nvidia,bpmp a phandle+cell.
> BPMP needs to know the controller number to enable it hence it needs to be
> passed to BPMP. Just for accessing BPMP, I already added 'nvidia,bpmp' property.

Then make nvidia,bpmp take the phandle and this number.


> >> +- nvidia,disable-aspm-states: Controls advertisement of ASPM states
> >> +    bit-0 to '1': Disables advertisement of ASPM-L0s
> >> +    bit-1 to '1': Disables advertisement of ASPM-L1. This also disables
> >> +                   advertisement of ASPM-L1.1 and ASPM-L1.2
> >> +    bit-2 to '1': Disables advertisement of ASPM-L1.1
> >> +    bit-3 to '1': Disables advertisement of ASPM-L1.2
> >
> > Can't this cover what 'supports-clkreq' does?
> Well, they are related partially. i.e. if a platform doesn't have 'supports-clkreq' set,
> then, by definition, it can't advertise support for ASPM L1.1 and L1.2 states. But, ASPM-L0s
> and ASPM-L1 states don't depend on 'supports-clkreq' property.
> Having this property gives more granularity as to support for which particular ASPM state
> shouldn't be advertised by the root port.

Okay, then it should be a common property then.

Rob

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