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Message-ID: <20190517215303.3daebi7o66we2cjh@mbp>
Date: Fri, 17 May 2019 22:53:04 +0100
From: Catalin Marinas <catalin.marinas@....com>
To: Mark Salyzyn <salyzyn@...roid.com>
Cc: linux-kernel@...r.kernel.org, kernel-team@...roid.com,
Will Deacon <will.deacon@....com>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] arch64: export __flush_dcache_area
On Fri, May 17, 2019 at 12:59:56PM -0700, Mark Salyzyn wrote:
> Some (out of tree modular) drivers feel a need to ensure
> data is flushed to the DDR before continuing flow.
>
> Signed-off-by: Mark Salyzyn <salyzyn@...roid.com>
> Cc: linux-kernel@...r.kernel.org
> Cc: kernel-team@...roid.com
> ---
> arch/arm64/mm/cache.S | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
> index a194fd0e837f..70d7cb5c0bd2 100644
> --- a/arch/arm64/mm/cache.S
> +++ b/arch/arm64/mm/cache.S
> @@ -120,6 +120,7 @@ ENTRY(__flush_dcache_area)
> dcache_by_line_op civac, sy, x0, x1, x2, x3
> ret
> ENDPIPROC(__flush_dcache_area)
> +EXPORT_SYMBOL_GPL(__flush_dcache_area)
>
> /*
> * __clean_dcache_area_pou(kaddr, size)
NAK. Such drivers are doing something wrong, there is a dedicated
in-kernel API for that handles kernel maintenance (hint: DMA).
--
Catalin
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