lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20190521095631.v5n3qml5ujofufk4@core.my.home>
Date:   Tue, 21 May 2019 11:56:31 +0200
From:   Ondřej Jirman <megous@...ous.com>
To:     Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
Cc:     linux-sunxi@...glegroups.com,
        Maxime Ripard <maxime.ripard@...tlin.com>,
        Chen-Yu Tsai <wens@...e.org>, Rob Herring <robh+dt@...nel.org>,
        Icenowy Zheng <icenowy@...c.io>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Mark Rutland <mark.rutland@....com>,
        Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        Jose Abreu <joabreu@...opsys.com>,
        "David S. Miller" <davem@...emloft.net>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        netdev@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com
Subject: Re: [PATCH v5 2/6] net: stmmac: sun8i: force select external PHY
 when no internal one

Hello Sergei,

On Tue, May 21, 2019 at 12:27:24PM +0300, Sergei Shtylyov wrote:
> Hello!
> 
> On 21.05.2019 2:50, megous@...ous.com wrote:
> 
> > From: Icenowy Zheng <icenowy@...c.io>
> > 
> > The PHY selection bit also exists on SoCs without an internal PHY; if it's
> > set to 1 (internal PHY, default value) then the MAC will not make use of
> > any PHY such SoCs.
>          ^ "on" or "with" missing?

It's missing 'on'.

thank you,
	Ondrej

> > This problem appears when adapting for H6, which has no real internal PHY
> > (the "internal PHY" on H6 is not on-die, but on a co-packaged AC200 chip,
> > connected via RMII interface at GPIO bank A).
> > 
> > Force the PHY selection bit to 0 when the SOC doesn't have an internal PHY,
> > to address the problem of a wrong default value.
> > 
> > Signed-off-by: Icenowy Zheng <icenowy@...c.io>
> > Signed-off-by: Ondrej Jirman <megous@...ous.com>
> [...]
> 
> MBR, Sergei

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ