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Message-ID: <3d2c61ca-b91b-fdc7-7837-af6a3b71af7e@codeaurora.org>
Date: Sat, 25 May 2019 23:23:33 +0530
From: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <agross@...nel.org>,
David Brown <david.brown@...aro.org>,
Stephen Boyd <swboyd@...omium.org>
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v7 2/4] soc: qcom: Add AOSS QMP driver
On 5/1/2019 10:07 AM, Bjorn Andersson wrote:
> The Always On Subsystem (AOSS) Qualcomm Messaging Protocol (QMP) driver
> is used to communicate with the AOSS for certain side-channel requests,
> that are not available through the RPMh interface.
>
> The communication is a very simple synchronous mechanism of messages
> being written in message RAM and a doorbell in the AOSS is rung. As the
> AOSS has processed the message length is cleared and an interrupt is
> fired by the AOSS as acknowledgment.
>
> The driver exposes the QDSS clock as a clock and the low-power state
> associated with the remoteprocs in the system as a set of power-domains.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> ---
>
> Changes since v6:
> - Squash the pd into the same driver as the communication, to simplify
> the interaction.
> - Representing the QDSS clocks as a clock/power domain turns out to
> cascade into a request to make all Coresight drivers have a secondary
> compatible to replace the required bus clock with a required power
> domain. So in v7 this is exposed as a clock instead.
> - Some error checking updates, as reported by Doug.
>
Thanks for the patch Bjorn.
Tested the QDSS functionality on SDM845 based Cheza board with this
change and it works just fine.
Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
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