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Date: Sat, 25 May 2019 11:17:14 -0700 From: Bjorn Andersson <bjorn.andersson@...aro.org> To: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org> Cc: Andy Gross <agross@...nel.org>, David Brown <david.brown@...aro.org>, Stephen Boyd <swboyd@...omium.org>, Rob Herring <robh+dt@...nel.org>, Mark Rutland <mark.rutland@....com>, linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH v7 2/4] soc: qcom: Add AOSS QMP driver On Sat 25 May 10:53 PDT 2019, Sai Prakash Ranjan wrote: > On 5/1/2019 10:07 AM, Bjorn Andersson wrote: > > The Always On Subsystem (AOSS) Qualcomm Messaging Protocol (QMP) driver > > is used to communicate with the AOSS for certain side-channel requests, > > that are not available through the RPMh interface. > > > > The communication is a very simple synchronous mechanism of messages > > being written in message RAM and a doorbell in the AOSS is rung. As the > > AOSS has processed the message length is cleared and an interrupt is > > fired by the AOSS as acknowledgment. > > > > The driver exposes the QDSS clock as a clock and the low-power state > > associated with the remoteprocs in the system as a set of power-domains. > > > > Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org> > > --- > > > > Changes since v6: > > - Squash the pd into the same driver as the communication, to simplify > > the interaction. > > - Representing the QDSS clocks as a clock/power domain turns out to > > cascade into a request to make all Coresight drivers have a secondary > > compatible to replace the required bus clock with a required power > > domain. So in v7 this is exposed as a clock instead. > > - Some error checking updates, as reported by Doug. > > > > Thanks for the patch Bjorn. > Tested the QDSS functionality on SDM845 based Cheza board with this > change and it works just fine. > > Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org> Thanks for the confirmation Sai! Regards, Bjorn
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