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Message-Id: <20190528161101.28919-1-angus@akkea.ca>
Date: Tue, 28 May 2019 09:11:01 -0700
From: "Angus Ainslie (Purism)" <angus@...ea.ca>
To: angus.ainslie@...i.sm
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Lucas Stach <l.stach@...gutronix.de>,
Abel Vesa <abel.vesa@....com>,
Daniel Baluta <daniel.baluta@....com>,
Andrey Smirnov <andrew.smirnov@...il.com>,
"Angus Ainslie (Purism)" <angus@...ea.ca>,
Carlo Caione <ccaione@...libre.com>,
Guido Günther <agx@...xcpu.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2] arm64: dts: fsl: imx8mq: add the snvs power key node
Add a node for the snvs power key, "disabled" by default.
Signed-off-by: Angus Ainslie (Purism) <angus@...ea.ca>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 45d10d8efd14..85008dc6e663 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/power/imx8mq-power.h>
#include <dt-bindings/reset/imx8mq-reset.h>
#include <dt-bindings/gpio/gpio.h>
+#include "dt-bindings/input/input.h"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
#include "imx8mq-pinfunc.h"
@@ -463,6 +464,15 @@
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ snvs_pwrkey: snvs-powerkey {
+ compatible = "fsl,sec-v4.0-pwrkey";
+ regmap = <&snvs>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ linux,keycode = <KEY_POWER>;
+ wakeup-source;
+ status = "disabled";
+ };
};
clk: clock-controller@...80000 {
--
2.17.1
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