lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <DB3PR0402MB3916139B49D9EF7E44E33911F5190@DB3PR0402MB3916.eurprd04.prod.outlook.com>
Date:   Fri, 31 May 2019 12:13:02 +0000
From:   Anson Huang <anson.huang@....com>
To:     Fabio Estevam <festevam@...il.com>
CC:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Sascha Hauer <kernel@...gutronix.de>,
        Andrey Smirnov <andrew.smirnov@...il.com>,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        Bruno Thomsen <bruno.thomsen@...il.com>,
        Aisheng Dong <aisheng.dong@....com>,
        Jacky Bai <ping.bai@....com>, Leo Li <leoyang.li@....com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Pankaj Bansal <pankaj.bansal@....com>,
        Bhaskar Upadhaya <bhaskar.upadhaya@....com>,
        Pramod Kumar <pramod.kumar_1@....com>,
        Vabhav Sharma <vabhav.sharma@....com>,
        Leonard Crestez <leonard.crestez@....com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH 2/3] arm64: dts: freescale: Add i.MX8MN dtsi support

Hi, Fabio

> -----Original Message-----
> From: Fabio Estevam <festevam@...il.com>
> Sent: Friday, May 31, 2019 7:40 PM
> To: Anson Huang <anson.huang@....com>
> Cc: Rob Herring <robh+dt@...nel.org>; Mark Rutland
> <mark.rutland@....com>; Shawn Guo <shawnguo@...nel.org>; Sascha
> Hauer <s.hauer@...gutronix.de>; Sascha Hauer <kernel@...gutronix.de>;
> Andrey Smirnov <andrew.smirnov@...il.com>; Manivannan Sadhasivam
> <manivannan.sadhasivam@...aro.org>; Bruno Thomsen
> <bruno.thomsen@...il.com>; Aisheng Dong <aisheng.dong@....com>;
> Jacky Bai <ping.bai@....com>; Leo Li <leoyang.li@....com>; Lucas Stach
> <l.stach@...gutronix.de>; Pankaj Bansal <pankaj.bansal@....com>;
> Bhaskar Upadhaya <bhaskar.upadhaya@....com>; Pramod Kumar
> <pramod.kumar_1@....com>; Vabhav Sharma <vabhav.sharma@....com>;
> Leonard Crestez <leonard.crestez@....com>; open list:OPEN FIRMWARE
> AND FLATTENED DEVICE TREE BINDINGS <devicetree@...r.kernel.org>;
> linux-kernel <linux-kernel@...r.kernel.org>; moderated list:ARM/FREESCALE
> IMX / MXC ARM ARCHITECTURE <linux-arm-kernel@...ts.infradead.org>; dl-
> linux-imx <linux-imx@....com>
> Subject: Re: [PATCH 2/3] arm64: dts: freescale: Add i.MX8MN dtsi support
> 
> On Thu, May 30, 2019 at 6:45 AM <Anson.Huang@....com> wrote:
> 
> > +                       gpio1: gpio@...00000 {
> > +                               compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
> > +                               reg = <0x30200000 0x10000>;
> > +                               interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
> > +                                            <GIC_SPI 65
> > + IRQ_TYPE_LEVEL_HIGH>;
> 
> No GPIO clocks entries?

Just noticed this, the internal bring-up branch's clock driver does NOT have it,
I will add them in V2, thanks for pointing out this. 

> 
> > +                       usbphynop1: usbphynop1 {
> > +                               compatible = "usb-nop-xceiv";
> > +                               clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> > +                               assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> > +                               assigned-clock-parents = <&clk
> IMX8MN_SYS_PLL1_100M>;
> > +                               clock-names = "main_clk";
> > +                       };
> 
>  usbphynop1 does not have any registers associated, so it should be placed
> outside the soc.
> 
> Building with W=1 should warn you about that.
> 

OK, I will move them to outside of soc.

> > +                       usbphynop2: usbphynop2 {
> > +                               compatible = "usb-nop-xceiv";
> > +                               clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> > +                               assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> > +                               assigned-clock-parents = <&clk
> IMX8MN_SYS_PLL1_100M>;
> > +                               clock-names = "main_clk";
> > +                       };
> > +
> 
> Ditto

OK, I will move them to outside of soc.

Thanks,
Anson.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ