linux-kernel - Re: [PATCH V2 2/3] clk: imx: Add support for i.MX8MN clock driver

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Date:   Mon, 3 Jun 2019 08:45:16 +0000
From:   Leonard Crestez <leonard.crestez@....com>
To:     Anson Huang <anson.huang@....com>,
        "mturquette@...libre.com" <mturquette@...libre.com>,
        "sboyd@...nel.org" <sboyd@...nel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "festevam@...il.com" <festevam@...il.com>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "will.deacon@....com" <will.deacon@....com>,
        "maxime.ripard@...tlin.com" <maxime.ripard@...tlin.com>,
        "olof@...om.net" <olof@...om.net>,
        "horms+renesas@...ge.net.au" <horms+renesas@...ge.net.au>,
        "jagan@...rulasolutions.com" <jagan@...rulasolutions.com>,
        "bjorn.andersson@...aro.org" <bjorn.andersson@...aro.org>,
        "dinguyen@...nel.org" <dinguyen@...nel.org>,
        "enric.balletbo@...labora.com" <enric.balletbo@...labora.com>,
        Aisheng Dong <aisheng.dong@....com>,
        Jacky Bai <ping.bai@....com>, Abel Vesa <abel.vesa@....com>,
        "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC:     dl-linux-imx <linux-imx@....com>
Subject: Re: [PATCH V2 2/3] clk: imx: Add support for i.MX8MN clock driver

On 6/3/2019 4:33 AM, Anson.Huang@....com wrote:
> From: Anson Huang <Anson.Huang@....com>
> 
> This patch adds i.MX8MN clock driver support. 

> +#include "clk.h"
> +
> +#define PLL_1416X_RATE(_rate, _m, _p, _s)		\
> +	{						\
> +		.rate	=	(_rate),		\
> +		.mdiv	=	(_m),			\
> +		.pdiv	=	(_p),			\
> +		.sdiv	=	(_s),			\
> +	}
> +
> +#define PLL_1443X_RATE(_rate, _m, _p, _s, _k)		\
> +	{						\
> +		.rate	=	(_rate),		\
> +		.mdiv	=	(_m),			\
> +		.pdiv	=	(_p),			\
> +		.sdiv	=	(_s),			\
> +		.kdiv	=	(_k),			\
> +	}

These macros are shared with clk-imx8mm (and perhaps some future chips) 
so they should be moved to driver/clk/imx/clk.h