linux-kernel - Re: [v4 3/7] drm/mediatek: add dsi reg commit disable control

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Date:   Mon, 3 Jun 2019 10:19:34 +0800
From:   CK Hu <ck.hu@...iatek.com>
To:     Jitao Shi <jitao.shi@...iatek.com>
CC:     Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
        "Mark Rutland" <mark.rutland@....com>,
        Ian Campbell <ijc+devicetree@...lion.org.uk>,
        <linux-pwm@...r.kernel.org>, David Airlie <airlied@...ux.ie>,
        Matthias Brugger <matthias.bgg@...il.com>,
        "Thierry Reding" <treding@...dia.com>,
        Ajay Kumar <ajaykumar.rs@...sung.com>,
        "Inki Dae" <inki.dae@...sung.com>,
        Rahul Sharma <rahul.sharma@...sung.com>,
        "Sean Paul" <seanpaul@...omium.org>,
        Vincent Palatin <vpalatin@...omium.org>,
        "Andy Yan" <andy.yan@...k-chips.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Russell King <rmk+kernel@....linux.org.uk>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <dri-devel@...ts.freedesktop.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <srv_heupstream@...iatek.com>,
        Sascha Hauer <kernel@...gutronix.de>,
        <yingjoe.chen@...iatek.com>, <eddie.huang@...iatek.com>,
        <cawa.cheng@...iatek.com>, <bibby.hsieh@...iatek.com>,
        <stonea168@....com>
Subject: Re: [v4 3/7] drm/mediatek: add dsi reg commit disable control

Hi, Jitao:

On Sat, 2019-06-01 at 17:26 +0800, Jitao Shi wrote:
> New DSI IP has shadow register and working reg. The register
> values are writen to shadow register. And then trigger with
> commit reg, the register values will be moved working register.
> 
> This fucntion is defualt on. But this driver doesn't use this
> function. So add the disable control.

Reviewed-by: CK Hu <ck.hu@...iatek.com>

> 
> Signed-off-by: Jitao Shi <jitao.shi@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index a48db056df6c..eea47294079e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -131,6 +131,10 @@
>  #define VM_CMD_EN			BIT(0)
>  #define TS_VFP_EN			BIT(5)
>  
> +#define DSI_SHADOW_DEBUG	0x190U
> +#define FORCE_COMMIT			BIT(0)
> +#define BYPASS_SHADOW			BIT(1)
> +
>  #define CONFIG				(0xff << 0)
>  #define SHORT_PACKET			0
>  #define LONG_PACKET			2
> @@ -157,6 +161,7 @@ struct phy;
>  
>  struct mtk_dsi_driver_data {
>  	const u32 reg_cmdq_off;
> +	bool has_shadow_ctl;
>  };
>  
>  struct mtk_dsi {
> @@ -594,6 +599,11 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi)
>  	}
>  
>  	mtk_dsi_enable(dsi);
> +
> +	if (dsi->driver_data->has_shadow_ctl)
> +		writel(FORCE_COMMIT | BYPASS_SHADOW,
> +		       dsi->regs + DSI_SHADOW_DEBUG);
> +
>  	mtk_dsi_reset_engine(dsi);
>  	mtk_dsi_phy_timconfig(dsi);
>