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Message-ID: <tip-b657688069a24c3c81b6de22e0e57e1785d9211f@git.kernel.org>
Date: Mon, 3 Jun 2019 06:30:27 -0700
From: tip-bot for Jiri Olsa <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: hpa@...or.com, torvalds@...ux-foundation.org, acme@...nel.org,
tglx@...utronix.de, gregkh@...uxfoundation.org,
alexander.shishkin@...ux.intel.com, jolsa@...nel.org,
peterz@...radead.org, mingo@...nel.org,
linux-kernel@...r.kernel.org, namhyung@...nel.org
Subject: [tip:perf/core] perf/x86/intel: Use update attributes for skylake
format
Commit-ID: b657688069a24c3c81b6de22e0e57e1785d9211f
Gitweb: https://git.kernel.org/tip/b657688069a24c3c81b6de22e0e57e1785d9211f
Author: Jiri Olsa <jolsa@...nel.org>
AuthorDate: Sun, 12 May 2019 17:55:17 +0200
Committer: Ingo Molnar <mingo@...nel.org>
CommitDate: Mon, 3 Jun 2019 11:58:26 +0200
perf/x86/intel: Use update attributes for skylake format
Using the new pmu::update_attrs attribute group for
skylake specific format attributes.
Signed-off-by: Jiri Olsa <jolsa@...nel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Link: https://lkml.kernel.org/r/20190512155518.21468-9-jolsa@kernel.org
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
arch/x86/events/intel/core.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index de4779f44737..3bc967be7c7b 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4453,6 +4453,11 @@ static struct attribute_group group_format_extra = {
.is_visible = exra_is_visible,
};
+static struct attribute_group group_format_extra_skl = {
+ .name = "format",
+ .is_visible = exra_is_visible,
+};
+
static const struct attribute_group *attr_update[] = {
&group_events_td,
&group_events_mem,
@@ -4460,6 +4465,7 @@ static const struct attribute_group *attr_update[] = {
&group_caps_gen,
&group_caps_lbr,
&group_format_extra,
+ &group_format_extra_skl,
NULL,
};
@@ -4467,11 +4473,11 @@ static struct attribute *empty_attrs;
__init int intel_pmu_init(void)
{
+ struct attribute **extra_skl_attr = &empty_attrs;
struct attribute **extra_attr = &empty_attrs;
struct attribute **td_attr = &empty_attrs;
struct attribute **mem_attr = &empty_attrs;
struct attribute **tsx_attr = &empty_attrs;
- struct attribute **to_free = NULL;
union cpuid10_edx edx;
union cpuid10_eax eax;
union cpuid10_ebx ebx;
@@ -4959,8 +4965,7 @@ __init int intel_pmu_init(void)
x86_pmu.get_event_constraints = hsw_get_event_constraints;
extra_attr = boot_cpu_has(X86_FEATURE_RTM) ?
hsw_format_attr : nhm_format_attr;
- extra_attr = merge_attr(extra_attr, skl_format_attr);
- to_free = extra_attr;
+ extra_skl_attr = skl_format_attr;
td_attr = hsw_events_attrs;
mem_attr = hsw_mem_events_attrs;
tsx_attr = hsw_tsx_events_attrs;
@@ -4998,7 +5003,7 @@ __init int intel_pmu_init(void)
x86_pmu.get_event_constraints = icl_get_event_constraints;
extra_attr = boot_cpu_has(X86_FEATURE_RTM) ?
hsw_format_attr : nhm_format_attr;
- extra_attr = merge_attr(extra_attr, skl_format_attr);
+ extra_skl_attr = skl_format_attr;
mem_attr = icl_events_attrs;
tsx_attr = icl_tsx_events_attrs;
x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xca, .umask=0x02);
@@ -5033,6 +5038,7 @@ __init int intel_pmu_init(void)
group_events_mem.attrs = mem_attr;
group_events_tsx.attrs = tsx_attr;
group_format_extra.attrs = extra_attr;
+ group_format_extra_skl.attrs = extra_skl_attr;
x86_pmu.attr_update = attr_update;
@@ -5113,7 +5119,6 @@ __init int intel_pmu_init(void)
if (x86_pmu.counter_freezing)
x86_pmu.handle_irq = intel_pmu_handle_irq_v4;
- kfree(to_free);
return 0;
}
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