linux-kernel - Re: [PATCH v4 1/2] drivers: base: cacheinfo: Add variable to record max cache line size

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Message-ID: <20190604124515.GB6610@arrakis.emea.arm.com>
Date:   Tue, 4 Jun 2019 13:45:15 +0100
From:   Catalin Marinas <catalin.marinas@....com>
To:     Shaokun Zhang <zhangshaokun@...ilicon.com>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "Rafael J. Wysocki" <rafael@...nel.org>,
        Sudeep Holla <sudeep.holla@....com>,
        Jeremy Linton <jeremy.linton@....com>,
        Will Deacon <will.deacon@....com>
Subject: Re: [PATCH v4 1/2] drivers: base: cacheinfo: Add variable to record
 max cache line size

On Tue, May 28, 2019 at 10:16:53AM +0800, Shaokun Zhang wrote:
> Add coherency_max_size variable to record the maximum cache line size
> for different cache levels. If it is available, we will synchronize
> it as cache line size, otherwise we will use CTR_EL0.CWG reporting
> in cache_line_size() for arm64.
> 
> Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
> Cc: "Rafael J. Wysocki" <rafael@...nel.org>
> Cc: Sudeep Holla <sudeep.holla@....com>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Jeremy Linton <jeremy.linton@....com>
> Cc: Will Deacon <will.deacon@....com>
> Signed-off-by: Shaokun Zhang <zhangshaokun@...ilicon.com>

Both patches queued for 5.3. Thanks.

-- 
Catalin