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Message-ID: <20190605103506.22863-3-james.qian.wang@arm.com>
Date: Wed, 5 Jun 2019 10:35:39 +0000
From: "james qian wang (Arm Technology China)" <james.qian.wang@....com>
To: Liviu Dudau <Liviu.Dudau@....com>,
"airlied@...ux.ie" <airlied@...ux.ie>,
Brian Starkey <Brian.Starkey@....com>,
"maarten.lankhorst@...ux.intel.com"
<maarten.lankhorst@...ux.intel.com>,
"sean@...rly.run" <sean@...rly.run>
CC: "Jonathan Chai (Arm Technology China)" <Jonathan.Chai@....com>,
"Julien Yin (Arm Technology China)" <Julien.Yin@....com>,
"thomas Sun (Arm Technology China)" <thomas.Sun@....com>,
"Lowry Li (Arm Technology China)" <Lowry.Li@....com>,
Ayan Halder <Ayan.Halder@....com>,
"Tiannan Zhu (Arm Technology China)" <Tiannan.Zhu@....com>,
"Yiqi Kang (Arm Technology China)" <Yiqi.Kang@....com>,
nd <nd@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
Ben Davis <Ben.Davis@....com>,
"Oscar Zhang (Arm Technology China)" <Oscar.Zhang@....com>,
"Channing Chen (Arm Technology China)" <Channing.Chen@....com>,
"james qian wang (Arm Technology China)" <james.qian.wang@....com>
Subject: [PATCH 2/3] drm/komeda: Rename main engine clk name "mclk" to "aclk"
To avoid confusion, unify the driver main engine clk name "mclk" to
the spec name "aclk".
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@....com>
---
.../arm/display/komeda/d71/d71_component.c | 10 +++---
.../gpu/drm/arm/display/komeda/komeda_crtc.c | 34 +++++++++----------
.../gpu/drm/arm/display/komeda/komeda_dev.c | 18 +++++-----
.../gpu/drm/arm/display/komeda/komeda_dev.h | 4 +--
.../gpu/drm/arm/display/komeda/komeda_kms.h | 6 ++--
.../drm/arm/display/komeda/komeda_pipeline.h | 4 +--
.../display/komeda/komeda_pipeline_state.c | 4 +--
7 files changed, 40 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
index 769f5a2da030..87248babca1f 100644
--- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
+++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
@@ -902,7 +902,7 @@ static int d71_merger_init(struct d71_dev *d71,
static int d71_downscaling_clk_check(struct komeda_pipeline *pipe,
struct drm_display_mode *mode,
- unsigned long mclk_rate,
+ unsigned long aclk_rate,
struct komeda_data_flow_cfg *dflow)
{
u32 h_in = dflow->in_w;
@@ -912,20 +912,20 @@ static int d71_downscaling_clk_check(struct komeda_pipeline *pipe,
/* D71 downscaling must satisfy the following equation
*
- * MCLK h_in * v_in
+ * ACLK h_in * v_in
* ------- >= ---------------------------------------------
* PXLCLK (h_total - (1 + 2 * v_in / v_out)) * v_out
*
* In only horizontal downscaling situation, the right side should be
* multiplied by (h_total - 3) / (h_active - 3), then equation becomes
*
- * MCLK h_in
+ * ACLK h_in
* ------- >= ----------------
* PXLCLK (h_active - 3)
*
* To avoid precision lost the equation 1 will be convert to:
*
- * MCLK h_in * v_in
+ * ACLK h_in * v_in
* ------- >= -----------------------------------
* PXLCLK (h_total -1 ) * v_out - 2 * v_in
*/
@@ -937,7 +937,7 @@ static int d71_downscaling_clk_check(struct komeda_pipeline *pipe,
denominator = (mode->htotal - 1) * v_out - 2 * v_in;
}
- return mclk_rate * denominator >= mode->clock * 1000 * fraction ?
+ return aclk_rate * denominator >= mode->clock * 1000 * fraction ?
0 : -EINVAL;
}
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
index 3933f4377cc1..66c5e0d2925c 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
@@ -20,7 +20,7 @@
static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st)
{
- u64 pxlclk, mclk;
+ u64 pxlclk, aclk;
if (!kcrtc_st->base.active) {
kcrtc_st->clock_ratio = 0;
@@ -28,10 +28,10 @@ static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st)
}
pxlclk = kcrtc_st->base.adjusted_mode.clock * 1000;
- mclk = komeda_calc_mclk(kcrtc_st) << 32;
+ aclk = komeda_calc_aclk(kcrtc_st) << 32;
- do_div(mclk, pxlclk);
- kcrtc_st->clock_ratio = mclk;
+ do_div(aclk, pxlclk);
+ kcrtc_st->clock_ratio = aclk;
}
/**
@@ -75,12 +75,12 @@ komeda_crtc_atomic_check(struct drm_crtc *crtc,
return 0;
}
-unsigned long komeda_calc_mclk(struct komeda_crtc_state *kcrtc_st)
+unsigned long komeda_calc_aclk(struct komeda_crtc_state *kcrtc_st)
{
struct komeda_dev *mdev = kcrtc_st->base.crtc->dev->dev_private;
unsigned long pxlclk = kcrtc_st->base.adjusted_mode.clock;
- return clk_round_rate(mdev->mclk, pxlclk * 1000);
+ return clk_round_rate(mdev->aclk, pxlclk * 1000);
}
/* For active a crtc, mainly need two parts of preparation
@@ -113,18 +113,18 @@ komeda_crtc_prepare(struct komeda_crtc *kcrtc)
}
mdev->dpmode = new_mode;
- /* Only need to enable mclk on single display mode, but no need to
- * enable mclk it on dual display mode, since the dual mode always
- * switch from single display mode, the mclk already enabled, no need
+ /* Only need to enable aclk on single display mode, but no need to
+ * enable aclk it on dual display mode, since the dual mode always
+ * switch from single display mode, the aclk already enabled, no need
* to enable it again.
*/
if (new_mode != KOMEDA_MODE_DUAL_DISP) {
- err = clk_set_rate(mdev->mclk, komeda_calc_mclk(kcrtc_st));
+ err = clk_set_rate(mdev->aclk, komeda_calc_aclk(kcrtc_st));
if (err)
- DRM_ERROR("failed to set mclk.\n");
- err = clk_prepare_enable(mdev->mclk);
+ DRM_ERROR("failed to set aclk.\n");
+ err = clk_prepare_enable(mdev->aclk);
if (err)
- DRM_ERROR("failed to enable mclk.\n");
+ DRM_ERROR("failed to enable aclk.\n");
}
err = clk_set_rate(master->pxlclk, pxlclk_rate);
@@ -168,7 +168,7 @@ komeda_crtc_unprepare(struct komeda_crtc *kcrtc)
clk_disable_unprepare(master->pxlclk);
if (new_mode == KOMEDA_MODE_INACTIVE)
- clk_disable_unprepare(mdev->mclk);
+ clk_disable_unprepare(mdev->aclk);
unlock:
mutex_unlock(&mdev->lock);
@@ -354,7 +354,6 @@ komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m)
if (m->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- /* main clock/AXI clk must be faster than pxlclk*/
mode_clk = m->clock * 1000;
pxlclk = clk_round_rate(master->pxlclk, mode_clk);
if (pxlclk != mode_clk) {
@@ -363,8 +362,9 @@ komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m)
return MODE_NOCLOCK;
}
- if (clk_round_rate(mdev->mclk, mode_clk) < pxlclk) {
- DRM_DEBUG_ATOMIC("mclk can't satisfy the requirement of %s-clk: %ld.\n",
+ /* main engine clock must be faster than pxlclk*/
+ if (clk_round_rate(mdev->aclk, mode_clk) < pxlclk) {
+ DRM_DEBUG_ATOMIC("engine clk can't satisfy the requirement of %s-clk: %ld.\n",
m->name, pxlclk);
return MODE_CLOCK_HIGH;
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
index f8f6edbf6f0d..405c64dce355 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
@@ -192,15 +192,15 @@ struct komeda_dev *komeda_dev_create(struct device *dev)
goto err_cleanup;
}
- mdev->mclk = devm_clk_get(dev, "mclk");
- if (IS_ERR(mdev->mclk)) {
+ mdev->aclk = devm_clk_get(dev, "aclk");
+ if (IS_ERR(mdev->aclk)) {
DRM_ERROR("Get engine clk failed.\n");
- err = PTR_ERR(mdev->mclk);
- mdev->mclk = NULL;
+ err = PTR_ERR(mdev->aclk);
+ mdev->aclk = NULL;
goto err_cleanup;
}
- clk_prepare_enable(mdev->mclk);
+ clk_prepare_enable(mdev->aclk);
mdev->funcs = product->identify(mdev->reg_base, &mdev->chip);
if (!komeda_product_match(mdev, product->product_id)) {
@@ -300,10 +300,10 @@ void komeda_dev_destroy(struct komeda_dev *mdev)
mdev->reg_base = NULL;
}
- if (mdev->mclk) {
- clk_disable_unprepare(mdev->mclk);
- devm_clk_put(dev, mdev->mclk);
- mdev->mclk = NULL;
+ if (mdev->aclk) {
+ clk_disable_unprepare(mdev->aclk);
+ devm_clk_put(dev, mdev->aclk);
+ mdev->aclk = NULL;
}
devm_kfree(dev, mdev);
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
index 5feaed2dc93f..d1c86b6174c8 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
@@ -160,8 +160,8 @@ struct komeda_dev {
struct komeda_chip_info chip;
/** @fmt_tbl: initialized by &komeda_dev_funcs->init_format_table */
struct komeda_format_caps_table fmt_tbl;
- /** @mclk: HW main engine clk */
- struct clk *mclk;
+ /** @aclk: HW main engine clk */
+ struct clk *aclk;
/** @irq: irq number */
int irq;
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h
index e7fa00e079a7..219fa3f0c336 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h
@@ -95,7 +95,7 @@ struct komeda_crtc {
/** @disable_done: this flip_done is for tracing the disable */
struct completion *disable_done;
- /** @clock_ratio_property: property for ratio of (mclk << 32)/pxlclk */
+ /** @clock_ratio_property: property for ratio of (aclk << 32)/pxlclk */
struct drm_property *clock_ratio_property;
/** @slave_planes_property: property for slaves of the planes */
@@ -123,7 +123,7 @@ struct komeda_crtc_state {
*/
u32 active_pipes;
- /** @clock_ratio: ratio of (mclk << 32)/pxlclk */
+ /** @clock_ratio: ratio of (aclk << 32)/pxlclk */
u64 clock_ratio;
/** @max_slave_zorder: the maximum of slave zorder */
@@ -182,7 +182,7 @@ static inline bool has_flip_h(u32 rot)
return !!(rotation & DRM_MODE_REFLECT_X);
}
-unsigned long komeda_calc_mclk(struct komeda_crtc_state *kcrtc_st);
+unsigned long komeda_calc_aclk(struct komeda_crtc_state *kcrtc_st);
int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev);
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
index 090a5d92d5f1..7af3e266bdff 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
@@ -364,12 +364,12 @@ struct komeda_data_flow_cfg {
};
struct komeda_pipeline_funcs {
- /* check if the mclk (main engine clock) can satisfy the clock
+ /* check if the aclk (main engine clock) can satisfy the clock
* requirements of the downscaling that specified by dflow
*/
int (*downscaling_clk_check)(struct komeda_pipeline *pipe,
struct drm_display_mode *mode,
- unsigned long mclk_rate,
+ unsigned long aclk_rate,
struct komeda_data_flow_cfg *dflow);
/* dump_register: Optional, dump registers to seq_file */
void (*dump_register)(struct komeda_pipeline *pipe,
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
index 44a51d84e602..257f0aedd11d 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
@@ -473,9 +473,9 @@ komeda_scaler_check_cfg(struct komeda_scaler *scaler,
err = pipe->funcs->downscaling_clk_check(pipe,
&kcrtc_st->base.adjusted_mode,
- komeda_calc_mclk(kcrtc_st), dflow);
+ komeda_calc_aclk(kcrtc_st), dflow);
if (err) {
- DRM_DEBUG_ATOMIC("mclk can't satisfy the clock requirement of the downscaling\n");
+ DRM_DEBUG_ATOMIC("aclk can't satisfy the clock requirement of the downscaling\n");
return err;
}
}
--
2.17.1
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