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Message-Id: <20190611185102.368ED21744@mail.kernel.org>
Date:   Tue, 11 Jun 2019 11:51:01 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     tengfeif@...eaurora.org
Cc:     Bjorn Andersson <bjorn.andersson@...aro.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Niklas Cassel <niklas.cassel@...aro.org>,
        Andy Gross <andy.gross@...aro.org>,
        David Brown <david.brown@...aro.org>,
        MSM <linux-arm-msm@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] pinctrl: qcom: Clear status bit on irq_unmask

Quoting tengfeif@...eaurora.org (2019-06-11 03:41:26)
> On 2019-06-10 22:51, Stephen Boyd wrote:
> > Quoting Linus Walleij (2019-06-07 14:08:10)
> >> On Fri, May 31, 2019 at 8:52 AM Tengfei Fan <tengfeif@...eaurora.org> 
> >> wrote:
> >> 
> >> > The gpio interrupt status bit is getting set after the
> >> > irq is disabled and causing an immediate interrupt after
> >> > enablling the irq, so clear status bit on irq_unmask.
> >> >
> >> > Signed-off-by: Tengfei Fan <tengfeif@...eaurora.org>
> >> 
> >> This looks pretty serious, can one of the Qcom maintainers ACK
> >> this?
> >> 
> >> Should it be sent to fixes and even stable?
> >> 
> >> Fixes: tag?
> >> 
> > 
> > How is the interrupt status bit getting set after the irq is disabled?
> > It looks like this is a level type interrupt? I thought that after
> > commit b55326dc969e ("pinctrl: msm: Really mask level interrupts to
> > prevent latching") this wouldn't be a problem. Am I wrong, or is qcom
> > just clearing out patches on drivers and this is the last one that 
> > needs
> > to be upstreamed?
> 
> Your patch(commit b55326dc969e) can cover our issue, and my patch is no 
> longer needed.
> Your patch isn't included in our code, so I submitted this patch.

Alright cool. Sounds like this patch can be dropped then and you can
pick up the patch from upstream into your vendor kernel.

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