linux-kernel - Re: [PATCH 1/2] dt-bindings: pinctrl: qcom: Add SM8150 pinctrl binding

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Date:   Mon, 17 Jun 2019 11:51:58 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        linux-arm-msm@...r.kernel.org,
        Prasad Sodagudi <psodagud@...eaurora.org>,
        Andy Gross <agross@...nel.org>,
        David Brown <david.brown@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        "Isaac J . Manjarres" <isaacm@...eaurora.org>
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: qcom: Add SM8150 pinctrl
 binding

On 16-06-19, 21:20, Bjorn Andersson wrote:
> On Thu 13 Jun 22:30 PDT 2019, Vinod Koul wrote:

> > +- reg:
> > +	Usage: required
> > +	Value type: <prop-encoded-array>
> > +	Definition: the base address and size of the north, south , west
> 
> Extra space after south.

Thanks will fix that

> > +- #gpio-cells:
> > +	Usage: required
> > +	Value type: <u32>
> > +	Definition: must be 2. Specifying the pin number and flags, as defined
> > +		    in <dt-bindings/gpio/gpio.h>
> > +
> 
> Please also document gpio-ranges and gpio-reserved-ranges.

Will add

> > +Example:
> > +
> > +	tlmm: pinctrl@...0000 {
> > +		compatible = "qcom,sm8150-pinctrl";
> > +		reg = <0x03100000 0x300000>,
> > +		      <0x03500000 0x300000>,
> > +		      <0x03900000 0x300000>,
> > +		      <0x03D00000 0x300000>;
> > +		reg-names = "west", "east", "north", "south";
> > +		interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> > +		gpio-controller;
> > +		#gpio-cells = <2>;
> > +		interrupt-controller;
> > +		#interrupt-cells = <2>;
> 
> You're missing the required gpio-ranges from the example, see e.g.
> msm8996 (and please send a patch to the binding you based this on).

I ported this from downstream but did look at existing upstream
examples so will do that

-- 
~Vinod