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Message-ID: <20190618164208.GB4270@fuggles.cambridge.arm.com>
Date:   Tue, 18 Jun 2019 17:42:08 +0100
From:   Will Deacon <will.deacon@....com>
To:     Jeremy Linton <jeremy.linton@....com>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-acpi@...r.kernel.org,
        linux-kernel@...r.kernel.org, catalin.marinas@....com,
        rjw@...ysocki.net, lenb@...nel.org, mark.rutland@....com,
        lorenzo.pieralisi@....com, sudeep.holla@....com
Subject: Re: [PATCH v4 0/4] arm64: SPE ACPI enablement

On Fri, Jun 14, 2019 at 08:09:06PM -0500, Jeremy Linton wrote:
> This patch series enables the Arm Statistical Profiling
> Extension (SPE) on ACPI platforms.
> 
> This is possible because ACPI 6.3 uses a previously
> reserved field in the MADT to store the SPE interrupt
> number, similarly to how the normal PMU is described.
> If a consistent valid interrupt exists across all the
> cores in the system, a platform device is registered.
> That then triggers the SPE module, which runs as normal.
> 
> We also add the ability to parse the PPTT for IDENTICAL
> cores. We then use this to sanity check the single SPE
> device we create. This creates a bit of a problem with
> respect to the specification though. The specification
> says that its legal for multiple tree's to exist in the
> PPTT. We handle this fine, but what happens in the
> case of multiple tree's is that the lack of a common
> node with IDENTICAL set forces us to assume that there
> are multiple non-IDENTICAL cores in the machine.
> 
> v3->v4: Rebase to 5.2.
> 	Minor formatting, patch rearrangement.
> 	Add missing `inline` in static header definition.
> 	Drop ARM_SPE_ACPI and just use ARM_SPE_PMU.

I'm happy to take this via the arm64 perf tree for 5.3, but I'll need
Acks from Raphael on the first two patches and an Ack from Lorenzo on
patch 3.

Cheers,

Will

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