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Message-ID: <20190618180851.GK4270@fuggles.cambridge.arm.com>
Date: Tue, 18 Jun 2019 19:08:51 +0100
From: Will Deacon <will.deacon@....com>
To: Jean-Philippe Brucker <jean-philippe.brucker@....com>
Cc: joro@...tes.org, robh+dt@...nel.org, mark.rutland@....com,
robin.murphy@....com, jacob.jun.pan@...ux.intel.com,
iommu@...ts.linux-foundation.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
eric.auger@...hat.com
Subject: Re: [PATCH 3/8] iommu/arm-smmu-v3: Support platform SSID
On Mon, Jun 10, 2019 at 07:47:09PM +0100, Jean-Philippe Brucker wrote:
> For platform devices that support SubstreamID (SSID), firmware provides
> the number of supported SSID bits. Restrict it to what the SMMU supports
> and cache it into master->ssid_bits.
>
> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@....com>
> ---
> drivers/iommu/arm-smmu-v3.c | 11 +++++++++++
> drivers/iommu/of_iommu.c | 6 +++++-
> include/linux/iommu.h | 1 +
> 3 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index 4d5a694f02c2..3254f473e681 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -604,6 +604,7 @@ struct arm_smmu_master {
> struct list_head domain_head;
> u32 *sids;
> unsigned int num_sids;
> + unsigned int ssid_bits;
> bool ats_enabled :1;
> };
>
> @@ -2097,6 +2098,16 @@ static int arm_smmu_add_device(struct device *dev)
> }
> }
>
> + master->ssid_bits = min(smmu->ssid_bits, fwspec->num_pasid_bits);
> +
> + /*
> + * If the SMMU doesn't support 2-stage CD, limit the linear
> + * tables to a reasonable number of contexts, let's say
> + * 64kB / sizeof(ctx_desc) = 1024 = 2^10
> + */
> + if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB))
> + master->ssid_bits = min(master->ssid_bits, 10U);
Please introduce a #define for the 10, so that it is computed in the way
you describe in the comment (a bit like we do for things like queue sizes).
> +
> group = iommu_group_get_for_dev(dev);
> if (!IS_ERR(group)) {
> iommu_group_put(group);
> diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c
> index f04a6df65eb8..04f4f6b95d82 100644
> --- a/drivers/iommu/of_iommu.c
> +++ b/drivers/iommu/of_iommu.c
> @@ -206,8 +206,12 @@ const struct iommu_ops *of_iommu_configure(struct device *dev,
> if (err)
> break;
> }
> - }
>
> + fwspec = dev_iommu_fwspec_get(dev);
> + if (!err && fwspec)
> + of_property_read_u32(master_np, "pasid-num-bits",
> + &fwspec->num_pasid_bits);
> + }
Hmm. Do you know if there's anything in ACPI for this?
Otherwise, patch looks fine. Thanks.
Will
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