linux-kernel - [PATCH 4/4] rts5208: Fix usleep range is preferred over udelay

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Message-Id: <20190619154648.13840-4-lukas.s.schneider@fau.de>
Date:   Wed, 19 Jun 2019 17:46:48 +0200
From:   Lukas Schneider <lukas.s.schneider@....de>
To:     kim.jamie.bradley@...il.com, pakki001@....edu,
        colin.king@...onical.com, devel@...verdev.osuosl.org,
        linux-kernel@...r.kernel.org
Cc:     Lukas Schneider <lukas.s.schneider@....de>,
        Jannik Moritz <jannik.moritz@....de>, linux-kernel@...cs.fau.de
Subject: [PATCH 4/4] rts5208: Fix usleep range is preferred over udelay

This patch fixes the issue reported by checkpatch:

CHECK: usleep_range is preferred over udelay;
see Doucmentation/timers/timers-howto.txt

It's save to sleep here instead of using busy waiting,
because we are not in an atomic context.

Signed-off-by: Lukas Schneider <lukas.s.schneider@....de>
Signed-off-by: Jannik Moritz <jannik.moritz@....de>
Cc: <linux-kernel@...cs.fau.de>
---
 drivers/staging/rts5208/sd.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/staging/rts5208/sd.c b/drivers/staging/rts5208/sd.c
index c256a2398651..23a3499096ce 100644
--- a/drivers/staging/rts5208/sd.c
+++ b/drivers/staging/rts5208/sd.c
@@ -865,7 +865,7 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
 						     PHASE_CHANGE);
 			if (retval)
 				return retval;
-			udelay(50);
+			usleep_range(50, 60);
 			retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
 						     PHASE_CHANGE |
 						     PHASE_NOT_RESET |
@@ -877,14 +877,14 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
 						     CHANGE_CLK, CHANGE_CLK);
 			if (retval)
 				return retval;
-			udelay(50);
+			usleep_range(50, 60);
 			retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
 						     PHASE_NOT_RESET |
 						     sample_point);
 			if (retval)
 				return retval;
 		}
-		udelay(100);
+		usleep_range(100, 110);
 
 		rtsx_init_cmd(chip);
 		rtsx_add_cmd(chip, WRITE_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE,
@@ -918,7 +918,7 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
 				return retval;
 		}
 
-		udelay(50);
+		usleep_range(50, 60);
 	}
 
 	retval = rtsx_write_register(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
@@ -1416,7 +1416,7 @@ static int sd_wait_data_idle(struct rtsx_chip *chip)
 			retval = STATUS_SUCCESS;
 			break;
 		}
-		udelay(100);
+		usleep_range(100, 110);
 	}
 	dev_dbg(rtsx_dev(chip), "SD_DATA_STATE: 0x%02x\n", val);
 
-- 
2.19.1