linux-kernel - Re: [Freedreno] [PATCH 2/6] dt-bindings: display: msm: gmu: add optional ocmem property

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20190619180636.GB17590@jcrouse1-lnx.qualcomm.com>
Date:   Wed, 19 Jun 2019 12:06:36 -0600
From:   Jordan Crouse <jcrouse@...eaurora.org>
To:     Brian Masney <masneyb@...tation.org>
Cc:     agross@...nel.org, david.brown@...aro.org, robdclark@...il.com,
        sean@...rly.run, robh+dt@...nel.org, mark.rutland@....com,
        devicetree@...r.kernel.org, jonathan@...ek.ca, airlied@...ux.ie,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        dri-devel@...ts.freedesktop.org, bjorn.andersson@...aro.org,
        daniel@...ll.ch, freedreno@...ts.freedesktop.org
Subject: Re: [Freedreno] [PATCH 2/6] dt-bindings: display: msm: gmu: add
 optional ocmem property

On Sun, Jun 16, 2019 at 09:29:26AM -0400, Brian Masney wrote:
> Some A3xx and A4xx Adreno GPUs do not have GMEM inside the GPU core and
> must use the On Chip MEMory (OCMEM) in order to be functional. Add the
> optional ocmem property to the Adreno Graphics Management Unit bindings.
> 
> Signed-off-by: Brian Masney <masneyb@...tation.org>
> ---
>  Documentation/devicetree/bindings/display/msm/gmu.txt | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/display/msm/gmu.txt b/Documentation/devicetree/bindings/display/msm/gmu.txt
> index 90af5b0a56a9..c746b95e95d4 100644
> --- a/Documentation/devicetree/bindings/display/msm/gmu.txt
> +++ b/Documentation/devicetree/bindings/display/msm/gmu.txt
> @@ -31,6 +31,10 @@ Required properties:
>  - iommus: phandle to the adreno iommu
>  - operating-points-v2: phandle to the OPP operating points
>  
> +Optional properties:
> +- ocmem: phandle to the On Chip Memory (OCMEM) that's present on some Snapdragon
> +         SoCs. See Documentation/devicetree/bindings/soc/qcom/qcom,ocmem.yaml.
> +
>  Example:

You should add a full-fledged a4xx example here including a ocmem phandle.

Jordan

>  / {

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project