lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <8ed08acd-6427-cb34-65b8-6d850eee1683@redhat.com>
Date:   Thu, 20 Jun 2019 14:24:33 +0200
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Wanpeng Li <kernellwp@...il.com>, linux-kernel@...r.kernel.org,
        kvm@...r.kernel.org
Cc:     Radim Krčmář <rkrcmar@...hat.com>,
        stable@...r.kernel.org
Subject: Re: [PATCH] KVM: VMX: Raise #GP when guest read/write forbidden
 IA32_XSS

On 20/06/19 11:00, Wanpeng Li wrote:
> From: Wanpeng Li <wanpengli@...cent.com>
> 
> Raise #GP when guest read/write forbidden IA32_XSS.  
> 
> Fixes: 203000993de5 (kvm: vmx: add MSR logic for XSAVES) 
> Reported-by: Xiaoyao Li <xiaoyao.li@...ux.intel.com>
> Reported-by: Tao Xu <tao3.xu@...el.com>
> Cc: Cc: Paolo Bonzini <pbonzini@...hat.com>
> Cc: Radim Krčmář <rkrcmar@...hat.com>
> Cc: stable@...r.kernel.org
> Signed-off-by: Wanpeng Li <wanpengli@...cent.com>

Queued, thanks.

Paolo

> ---
>  arch/x86/kvm/vmx/vmx.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index b939a68..d174b62 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -1732,7 +1732,10 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  		return vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index,
>  				       &msr_info->data);
>  	case MSR_IA32_XSS:
> -		if (!vmx_xsaves_supported())
> +		if (!vmx_xsaves_supported() ||
> +			(!msr_info->host_initiated &&
> +			!(guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
> +			guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))))
>  			return 1;
>  		msr_info->data = vcpu->arch.ia32_xss;
>  		break;
> @@ -1962,7 +1965,10 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  			return 1;
>  		return vmx_set_vmx_msr(vcpu, msr_index, data);
>  	case MSR_IA32_XSS:
> -		if (!vmx_xsaves_supported())
> +		if (!vmx_xsaves_supported() ||
> +			(!msr_info->host_initiated &&
> +			!(guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
> +			guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))))
>  			return 1;
>  		/*
>  		 * The only supported bit as of Skylake is bit 8, but
> -- 2.7.4
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ