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Message-ID: <alpine.DEB.2.21.1906211717500.5503@nanos.tec.linutronix.de>
Date:   Fri, 21 Jun 2019 17:22:09 +0200 (CEST)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     "Chang S. Bae" <chang.seok.bae@...el.com>
cc:     Andy Lutomirski <luto@...nel.org>, Ingo Molnar <mingo@...nel.org>,
        "H . Peter Anvin" <hpa@...or.com>, Andi Kleen <ak@...ux.intel.com>,
        Ravi Shankar <ravi.v.shankar@...el.com>,
        LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v7 07/18] x86/fsgsbase/64: Preserve FS/GS state in
 __switch_to() if FSGSBASE is on

On Wed, 8 May 2019, Chang S. Bae wrote:
> From: Andy Lutomirski <luto@...nel.org>
> 
> With the new FSGSBASE instructions, we can efficiently read and write
> the FSBASE and GSBASE in __switch_to().  Use that capability to preserve
> the full state.
> 
> This will enable user code to do whatever it wants with the new
> instructions without any kernel-induced gotchas.  (There can still be
> architectural gotchas: movl %gs,%eax; movl %eax,%gs may change GSBASE
> if WRGSBASE was used, but users are expected to read the CPU manual
> before doing things like that.)
> 
> This is a considerable speedup.  It seems to save about 100 cycles
> per context switch compared to the baseline 4.6-rc1 behavior on my
> Skylake laptop.
> 
> [ chang: 5~10% performance improvements were seen by a context switch
>   benchmark that ran threads with different FS/GSBASE values (to the
>   baseline 4.16). Minor edit on the changelog. ]
> 
> Signed-off-by: Andy Lutomirski <luto@...nel.org>
> Signed-off-by: Chang S. Bae <chang.seok.bae@...el.com>
> Reviewed-by: Andi Kleen <ak@...ux.intel.com>
> Cc: H. Peter Anvin <hpa@...or.com>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: Ingo Molnar <mingo@...nel.org>
> ---
>  arch/x86/kernel/process_64.c | 34 ++++++++++++++++++++++++++++------
>  1 file changed, 28 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
> index 17421c3..e2089c9 100644
> --- a/arch/x86/kernel/process_64.c
> +++ b/arch/x86/kernel/process_64.c
> @@ -239,8 +239,18 @@ static __always_inline void save_fsgs(struct task_struct *task)
>  {
>  	savesegment(fs, task->thread.fsindex);
>  	savesegment(gs, task->thread.gsindex);
> -	save_base_legacy(task, task->thread.fsindex, FS);
> -	save_base_legacy(task, task->thread.gsindex, GS);
> +	if (static_cpu_has(X86_FEATURE_FSGSBASE)) {
> +		/*
> +		 * If FSGSBASE is enabled, we can't make any useful guesses
> +		 * about the base, and user code expects us to save the current
> +		 * value.  Fortunately, reading the base directly is efficient.
> +		 */
> +		task->thread.fsbase = rdfsbase();
> +		task->thread.gsbase = __rdgsbase_inactive();

This explodes when called from copy_thread_tls() when an interrupt hits
after switching GS in __rdgsbase_inactive(). Wrapped it with
local_irq_save/restore().

Oh well.

Thanks,

	tglx

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