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Message-ID: <alpine.DEB.2.21.1906161805360.1760@nanos.tec.linutronix.de>
Date: Sun, 16 Jun 2019 18:07:09 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Randy Dunlap <rdunlap@...radead.org>
cc: "Chang S. Bae" <chang.seok.bae@...el.com>,
Andy Lutomirski <luto@...nel.org>,
Ingo Molnar <mingo@...nel.org>,
"H . Peter Anvin" <hpa@...or.com>, Andi Kleen <ak@...ux.intel.com>,
Ravi Shankar <ravi.v.shankar@...el.com>,
LKML <linux-kernel@...r.kernel.org>, x86@...nel.org,
Jonathan Corbet <corbet@....net>
Subject: Re: [PATCH v7 18/18] x86/fsgsbase/64: Add documentation for
FSGSBASE
On Sun, 16 Jun 2019, Randy Dunlap wrote:
> On 6/13/19 11:54 PM, Thomas Gleixner wrote:
> > +
> > +There exist two mechanisms to read and write the FS/FS base address:
>
> should this be... FS/GS
Indeed.
> > +FSGSBASE instructions enablement
> > +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> > + The instructions are enumerated in CPUID leaf 7, bit 0 of EBX. If
> > + available /proc/cpuinfo shows 'fsgsbase' in the flag entry of the CPUs.
> > +
> > + The availability of the instructions is not enabling them
>
> prefer: does not enable them
ok.
> > + automatically. The kernel has to enable them explicitely in CR4. The
>
> typo: explicitly
ok.
Randy, thanks for reviewing that!
tglx
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