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Message-Id: <20190625094324.19196-3-yibin.gong@nxp.com>
Date: Tue, 25 Jun 2019 17:43:20 +0800
From: yibin.gong@....com
To: robh@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de,
festevam@...il.com, mark.rutland@....com, vkoul@...nel.org,
dan.j.williams@...el.com, angelo@...am.it
Cc: linux-imx@....com, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, dmaengine@...r.kernel.org,
devicetree@...r.kernel.org, kernel@...gutronix.de
Subject: [PATCH v5 2/6] dmaengine: fsl-edma-common: move dmamux register to another single function
From: Robin Gong <yibin.gong@....com>
Prepare for edmav2 on i.mx7ulp whose dmamux register is 32bit. No function
impacted.
Signed-off-by: Robin Gong <yibin.gong@....com>
---
drivers/dma/fsl-edma-common.c | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
index 07d9689..ba74e10 100644
--- a/drivers/dma/fsl-edma-common.c
+++ b/drivers/dma/fsl-edma-common.c
@@ -77,6 +77,19 @@ void fsl_edma_disable_request(struct fsl_edma_chan *fsl_chan)
}
EXPORT_SYMBOL_GPL(fsl_edma_disable_request);
+static void mux_configure8(struct fsl_edma_chan *fsl_chan, void __iomem *addr,
+ u32 off, u32 slot, bool enable)
+{
+ u8 val8;
+
+ if (enable)
+ val8 = EDMAMUX_CHCFG_ENBL | slot;
+ else
+ val8 = EDMAMUX_CHCFG_DIS;
+
+ iowrite8(val8, addr + off);
+}
+
void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
unsigned int slot, bool enable)
{
@@ -90,10 +103,7 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
slot = EDMAMUX_CHCFG_SOURCE(slot);
- if (enable)
- iowrite8(EDMAMUX_CHCFG_ENBL | slot, muxaddr + ch_off);
- else
- iowrite8(EDMAMUX_CHCFG_DIS, muxaddr + ch_off);
+ mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable);
}
EXPORT_SYMBOL_GPL(fsl_edma_chan_mux);
--
2.7.4
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