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Message-Id: <fa54f9a1-481e-4146-a4c2-7c43cf9a26e8@www.fastmail.com>
Date: Thu, 27 Jun 2019 10:38:44 +0930
From: "Andrew Jeffery" <andrew@...id.au>
To: "Linus Walleij" <linus.walleij@...aro.org>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"Ryan Chen" <ryan_chen@...eedtech.com>,
"Rob Herring" <robh+dt@...nel.org>,
"Mark Rutland" <mark.rutland@....com>,
"Joel Stanley" <joel@....id.au>, linux-aspeed@...ts.ozlabs.org,
"OpenBMC Maillist" <openbmc@...ts.ozlabs.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"Linux ARM" <linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 0/8] pinctrl: aspeed: Preparation for AST2600
On Wed, 26 Jun 2019, at 17:25, Linus Walleij wrote:
> On Wed, Jun 26, 2019 at 9:15 AM Andrew Jeffery <andrew@...id.au> wrote:
>
> > The ASPEED AST2600 is in the pipeline, and we have enough information to start
> > preparing to upstream support for it. This series lays some ground work;
> > splitting the bindings and dicing the implementation up a little further to
> > facilitate differences between the 2600 and previous SoC generations.
>
> All looks good to me, but Rob should have a glance at the DT bindings
> and YAML syntax before I proceed to apply them.
Thanks for the quick review. Rob's responded, looks like I'll need to send a v2 at
least. Might need a hand sorting out describing generic pinctrl dt bits (subnodes
with function and group properties).
Cheers,
Andrew
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