linux-kernel - Re: [PATCH v2] arm64: dts: imx8mm: Init rates and parents configs for clocks

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Date:   Wed, 3 Jul 2019 16:05:02 +0300
From:   Daniel Baluta <daniel.baluta@...il.com>
To:     Abel Vesa <abel.vesa@....com>
Cc:     Rob Herring <robh@...nel.org>, Mark Rutland <mark.rutland@....com>,
        Shawn Guo <shawnguo@...nel.org>,
        Leonard Crestez <leonard.crestez@....com>,
        Jacky Bai <ping.bai@....com>,
        Sascha Hauer <kernel@...gutronix.de>,
        Daniel Baluta <daniel.baluta@....com>,
        NXP Linux Team <linux-imx@....com>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        Devicetree List <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] arm64: dts: imx8mm: Init rates and parents configs for clocks

On Wed, Jul 3, 2019 at 3:10 PM Abel Vesa <abel.vesa@....com> wrote:
>
> Add the initial configuration for clocks that need default parent and rate
> setting. This is based on the vendor tree clock provider parents and rates
> configuration except this is doing the setup in dts rather than using clock
> consumer API in a clock provider driver.
>
> Signed-off-by: Abel Vesa <abel.vesa@....com>

Thanks Abel, this helps audio.  For audio clk:

Acked-by: Daniel Baluta <daniel.baluta@....com>

> ---
>
> Changes since v1:
>  - removed the PCIE, CSI and DISP clocks parent setting since
>    that should be done from their driver.
>
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 232a741..ba2034d 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -451,6 +451,17 @@
>                                          <&clk_ext3>, <&clk_ext4>;
>                                 clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
>                                               "clk_ext3", "clk_ext4";
> +                               assigned-clocks = <&clk IMX8MM_CLK_NOC>,
> +                                               <&clk IMX8MM_CLK_AUDIO_AHB>,
> +                                               <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
> +                                               <&clk IMX8MM_SYS_PLL3>,
> +                                               <&clk IMX8MM_VIDEO_PLL1>;
> +                               assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
> +                                                        <&clk IMX8MM_SYS_PLL1_800M>;
> +                               assigned-clock-rates = <0>,
> +                                                       <400000000>,
> +                                                       <750000000>,
> +                                                       <594000000>;
>                         };
>
>                         src: reset-controller@...90000 {
> --
> 2.7.4
>