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Message-ID: <20190715072747.2743qdbk2umcpzgq@fsr-ub1664-175>
Date: Mon, 15 Jul 2019 07:27:48 +0000
From: Abel Vesa <abel.vesa@....com>
To: Peng Fan <peng.fan@....com>
CC: "mturquette@...libre.com" <mturquette@...libre.com>,
"sboyd@...nel.org" <sboyd@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
dl-linux-imx <linux-imx@....com>,
Leonard Crestez <leonard.crestez@....com>,
Anson Huang <anson.huang@....com>,
Jacky Bai <ping.bai@....com>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"van.freenix@...il.com" <van.freenix@...il.com>,
"stable@...r.kernel.org" <stable@...r.kernel.org>
Subject: Re: [PATCH] clk: imx: imx8mm: fix audio pll setting
On 19-07-15 02:55:43, Peng Fan wrote:
> From: Peng Fan <peng.fan@....com>
>
> The AUDIO PLL max support 650M, so the original clk settings violate
> spec. This patch makes the output 786432000 -> 393216000,
> and 722534400 -> 361267200 to aligned with NXP vendor kernel without any
> impact on audio functionality and go within 650MHz PLL limit.
>
> Cc: <stable@...r.kernel.org>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Peng Fan <peng.fan@....com>
Acked-by: Abel Vesa <abel.vesa@....com>
> ---
> drivers/clk/imx/clk-imx8mm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
> index 3a873e0e278f..b72bad064d8d 100644
> --- a/drivers/clk/imx/clk-imx8mm.c
> +++ b/drivers/clk/imx/clk-imx8mm.c
> @@ -55,8 +55,8 @@ static const struct imx_pll14xx_rate_table imx8mm_pll1416x_tbl[] = {
> };
>
> static const struct imx_pll14xx_rate_table imx8mm_audiopll_tbl[] = {
> - PLL_1443X_RATE(786432000U, 655, 5, 2, 23593),
> - PLL_1443X_RATE(722534400U, 301, 5, 1, 3670),
> + PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),
> + PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),
> };
>
> static const struct imx_pll14xx_rate_table imx8mm_videopll_tbl[] = {
> --
> 2.16.4
>
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