linux-kernel - [PATCH v1 34/50] ARM: dts: exynos: set parent clocks to PWM in Exynos5420

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Message-Id: <20190715124417.4787-35-l.luba@partner.samsung.com>
Date:   Mon, 15 Jul 2019 14:44:01 +0200
From:   Lukasz Luba <l.luba@...tner.samsung.com>
To:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-clk@...r.kernel.org
Cc:     mturquette@...libre.com, sboyd@...nel.org,
        b.zolnierkie@...sung.com, krzk@...nel.org, kgene@...nel.org,
        mark.rutland@....com, robh+dt@...nel.org, cw00.choi@...sung.com,
        kyungmin.park@...sung.com, a.hajda@...sung.com,
        m.szyprowski@...sung.com, s.nawrocki@...sung.com,
        myungjoo.ham@...sung.com, Lukasz Luba <l.luba@...tner.samsung.com>
Subject: [PATCH v1 34/50] ARM: dts: exynos: set parent clocks to PWM in
 Exynos5420

Change the parent of PWM clock to the CPLL which has 666MHz.
The PWM's divider uses /10 rate so it would set 66.6MHz.

Signed-off-by: Lukasz Luba <l.luba@...tner.samsung.com>
---
 arch/arm/boot/dts/exynos5420.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 79f635043247..a361dd5a6036 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -1473,6 +1473,8 @@
 
 &pwm {
 	clocks = <&clock CLK_PWM>;
+	assigned-clocks = <&clock CLK_MOUT_PWM>;
+	assigned-clock-parents = <&clock CLK_MOUT_SCLK_CPLL>;
 	clock-names = "timers";
 };
 
-- 
2.17.1