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Date:   Mon, 15 Jul 2019 14:43:33 +0200
From:   Lukasz Luba <l.luba@...tner.samsung.com>
To:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-clk@...r.kernel.org
Cc:     mturquette@...libre.com, sboyd@...nel.org,
        b.zolnierkie@...sung.com, krzk@...nel.org, kgene@...nel.org,
        mark.rutland@....com, robh+dt@...nel.org, cw00.choi@...sung.com,
        kyungmin.park@...sung.com, a.hajda@...sung.com,
        m.szyprowski@...sung.com, s.nawrocki@...sung.com,
        myungjoo.ham@...sung.com, Lukasz Luba <l.luba@...tner.samsung.com>
Subject: [PATCH v1 06/50] clk: samsung: add IDs to ACLK266 clocks in
 Exynos5420

Add IDs to MUXes related to ACLK266 for managing them from DT.

Signed-off-by: Lukasz Luba <l.luba@...tner.samsung.com>
---
 drivers/clk/samsung/clk-exynos5420.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 74276875bc3e..9b4a1d81f708 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -472,7 +472,8 @@ static const struct samsung_mux_clock exynos5800_mux_clks[] __initconst = {
 	MUX(0, "mout_aclk333_432_gscl", mout_group6_5800_p, SRC_TOP1, 0, 2),
 	MUX(0, "mout_aclk333_432_isp", mout_group6_5800_p, SRC_TOP1, 4, 2),
 	MUX(0, "mout_aclk333_432_isp0", mout_group6_5800_p, SRC_TOP1, 12, 2),
-	MUX(0, "mout_aclk266", mout_group5_5800_p, SRC_TOP1, 20, 2),
+	MUX(CLK_MOUT_ACLK266, "mout_aclk266", mout_group5_5800_p,
+			SRC_TOP1, 20, 2),
 	MUX(0, "mout_aclk333", mout_group1_5800_p, SRC_TOP1, 28, 2),
 
 	MUX(0, "mout_aclk400_disp1", mout_group7_5800_p, SRC_TOP2, 4, 3),
@@ -561,7 +562,7 @@ static const struct samsung_mux_clock exynos5420_mux_clks[] __initconst = {
 	MUX(0, "mout_aclk333_432_isp", mout_group4_p,
 				SRC_TOP1, 4, 2),
 	MUX(0, "mout_aclk333_432_isp0", mout_group4_p, SRC_TOP1, 12, 2),
-	MUX(0, "mout_aclk266", mout_group1_p, SRC_TOP1, 20, 2),
+	MUX(CLK_MOUT_ACLK266, "mout_aclk266", mout_group1_p, SRC_TOP1, 20, 2),
 	MUX(0, "mout_aclk333", mout_group1_p, SRC_TOP1, 28, 2),
 
 	MUX(0, "mout_aclk400_disp1", mout_group1_p, SRC_TOP2, 4, 2),
-- 
2.17.1

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