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Date: Mon, 15 Jul 2019 14:43:31 +0200 From: Lukasz Luba <l.luba@...tner.samsung.com> To: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org, linux-clk@...r.kernel.org Cc: mturquette@...libre.com, sboyd@...nel.org, b.zolnierkie@...sung.com, krzk@...nel.org, kgene@...nel.org, mark.rutland@....com, robh+dt@...nel.org, cw00.choi@...sung.com, kyungmin.park@...sung.com, a.hajda@...sung.com, m.szyprowski@...sung.com, s.nawrocki@...sung.com, myungjoo.ham@...sung.com, Lukasz Luba <l.luba@...tner.samsung.com> Subject: [PATCH v1 04/50] clk: samsung: add IDs to manage aclk400_mscl in Exynos5420 Add needed IDs to MUXes which are used from DT to properly set clock hierarchy. Signed-off-by: Lukasz Luba <l.luba@...tner.samsung.com> --- drivers/clk/samsung/clk-exynos5420.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 361ee53fc9fc..8f1d39cb2f1e 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -462,7 +462,8 @@ static const struct samsung_fixed_factor_clock static const struct samsung_mux_clock exynos5800_mux_clks[] __initconst = { MUX(0, "mout_aclk400_isp", mout_group3_5800_p, SRC_TOP0, 0, 3), - MUX(0, "mout_aclk400_mscl", mout_group3_5800_p, SRC_TOP0, 4, 3), + MUX(CLK_MOUT_ACLK400_MSCL, "mout_aclk400_mscl", mout_group3_5800_p, + SRC_TOP0, 4, 3), MUX(CLK_MOUT_ACLK400_WCORE, "mout_aclk400_wcore", mout_group2_5800_p, SRC_TOP0, 16, 3), MUX(0, "mout_aclk100_noc", mout_group1_5800_p, SRC_TOP0, 20, 2), @@ -548,7 +549,8 @@ static const struct samsung_mux_clock exynos5420_mux_clks[] __initconst = { TOP_SPARE2, 4, 1), MUX(0, "mout_aclk400_isp", mout_group1_p, SRC_TOP0, 0, 2), - MUX(0, "mout_aclk400_mscl", mout_group1_p, SRC_TOP0, 4, 2), + MUX(CLK_MOUT_ACLK400_MSCL, "mout_aclk400_mscl", mout_group1_p, + SRC_TOP0, 4, 2), MUX(CLK_MOUT_ACLK400_WCORE, "mout_aclk400_wcore", mout_group1_p, SRC_TOP0, 16, 2), MUX(0, "mout_aclk100_noc", mout_group1_p, SRC_TOP0, 20, 2), @@ -670,8 +672,8 @@ static const struct samsung_mux_clock exynos5x_mux_clks[] __initconst = { MUX(0, "mout_sw_aclk400_isp", mout_sw_aclk400_isp_p, SRC_TOP10, 0, 1), - MUX(0, "mout_sw_aclk400_mscl", mout_sw_aclk400_mscl_p, - SRC_TOP10, 4, 1), + MUX(CLK_MOUT_SW_ACLK400_MSCL, "mout_sw_aclk400_mscl", + mout_sw_aclk400_mscl_p, SRC_TOP10, 4, 1), MUX(CLK_MOUT_SW_ACLK200, "mout_sw_aclk200", mout_sw_aclk200_p, SRC_TOP10, 8, 1), MUX(0, "mout_sw_aclk200_fsys2", mout_sw_aclk200_fsys2_p, -- 2.17.1
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