linux-kernel - Re: [PATCH 17/18] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916

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Date:   Tue, 16 Jul 2019 15:47:30 +0100
From:   Sudeep Holla <sudeep.holla@....com>
To:     Ulf Hansson <ulf.hansson@...aro.org>
Cc:     Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>,
        Mark Rutland <mark.rutland@....com>,
        linux-arm-kernel@...ts.infradead.org,
        "Rafael J . Wysocki" <rjw@...ysocki.net>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        "Raju P . L . S . S . S . N" <rplsssn@...eaurora.org>,
        Amit Kucheria <amit.kucheria@...aro.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Stephen Boyd <sboyd@...nel.org>,
        Niklas Cassel <niklas.cassel@...aro.org>,
        Tony Lindgren <tony@...mide.com>,
        Kevin Hilman <khilman@...nel.org>,
        Lina Iyer <ilina@...eaurora.org>,
        Viresh Kumar <viresh.kumar@...aro.org>,
        Vincent Guittot <vincent.guittot@...aro.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Souvik Chakravarty <souvik.chakravarty@....com>,
        linux-pm@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org, Lina Iyer <lina.iyer@...aro.org>,
        Andy Gross <andy.gross@...aro.org>,
        Sudeep Holla <sudeep.holla@....com>,
        David Brown <david.brown@...aro.org>
Subject: Re: [PATCH 17/18] arm64: dts: Convert to the hierarchical CPU
 topology layout for MSM8916

On Mon, May 13, 2019 at 09:22:59PM +0200, Ulf Hansson wrote:
> From: Lina Iyer <lina.iyer@...aro.org>
>
> In the hierarchical layout, we are creating power domains around each CPU
> and describes the idle states for them inside the power domain provider
> node. Note that, the CPU's idle states still needs to be compatible with
> "arm,idle-state".
>
> Furthermore, represent the CPU cluster as a separate master power domain,
> powering the CPU's power domains. The cluster node, contains the idle
> states for the cluster and each idle state needs to be compatible with the
> "domain-idle-state".
>
> If the running platform is using a PSCI FW that supports the OS initiated
> CPU suspend mode, which likely should be the case unless the PSCI FW is
> very old, this change triggers the PSCI driver to enable it.
>
> Cc: Andy Gross <andy.gross@...aro.org>
> Cc: David Brown <david.brown@...aro.org>
> Signed-off-by: Lina Iyer <lina.iyer@...aro.org>
> Co-developed-by: Ulf Hansson <ulf.hansson@...aro.org>
> Signed-off-by: Ulf Hansson <ulf.hansson@...aro.org>
> ---

[...]

> @@ -166,12 +170,57 @@
>  				min-residency-us = <2000>;
>  				local-timer-stop;
>  			};
> +
> +			CLUSTER_RET: cluster-retention {
> +				compatible = "domain-idle-state";
> +				arm,psci-suspend-param = <0x1000010>;
> +				entry-latency-us = <500>;
> +				exit-latency-us = <500>;
> +				min-residency-us = <2000>;
> +			};
> +
> +			CLUSTER_PWRDN: cluster-gdhs {
> +				compatible = "domain-idle-state";
> +				arm,psci-suspend-param = <0x1000030>;
> +				entry-latency-us = <2000>;
> +				exit-latency-us = <2000>;
> +				min-residency-us = <6000>;
> +			};
>  		};
>  	};

I was trying to understand the composition of composite state parameters
in this series and that made me look at these DT examples.

What format does the above platform use ? I tried matching them to
both original as well as extended format and I fail to understand.
Assuming original format:
	State         power_state PowerLevel  StateType     StateID
	SPC           0x40000002   0(core)    0(Retention)  0x2 (Res0 b[29]=1?)
	CLUSTER_RET   0x1000010   1(clusters) 0(Retention)  0x10
	CLUSTER_PWRDN 0x1000030   1(clusters) 0(Retention?) 0x30
Now extended format:
	State         power_state StateType     StateID
	SPC           0x40000002  0(Retention)  0x40000002 (Res0 b[29]=1?)
	CLUSTER_RET   0x1000010   0(Retention)  0x1000010
	CLUSTER_PWRDN 0x1000030   0(Retention?) 0x1000030

What am I missing ?

--
Regards,
Sudeep