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Message-ID: <CAJKOXPdD-g1A+LKp1Nmmho2MVRxERfXb+Q3WsBrN=7YbnVufMQ@mail.gmail.com>
Date: Wed, 17 Jul 2019 12:33:27 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Lukasz Luba <l.luba@...tner.samsung.com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
"linux-samsung-soc@...r.kernel.org"
<linux-samsung-soc@...r.kernel.org>, linux-clk@...r.kernel.org,
mturquette@...libre.com, sboyd@...nel.org,
Bartłomiej Żołnierkiewicz
<b.zolnierkie@...sung.com>, kgene@...nel.org, mark.rutland@....com,
robh+dt@...nel.org, Chanwoo Choi <cw00.choi@...sung.com>,
kyungmin.park@...sung.com, Andrzej Hajda <a.hajda@...sung.com>,
Marek Szyprowski <m.szyprowski@...sung.com>,
s.nawrocki@...sung.com, myungjoo.ham@...sung.com
Subject: Re: [PATCH v1 30/50] ARM: dts: exynos: add bus_isp266 into Exynos5800
On Mon, 15 Jul 2019 at 14:45, Lukasz Luba <l.luba@...tner.samsung.com> wrote:
>
> The Exynos5420 SoC had one clock for two lines while Exynos5422/5800 have
> dedicated clock tree for the ACLK266_ISP. The max frequency is 300MHz so
> it shares the OPP table with bus_gen. The bus is added here and is enabled
> in .dts file for proper board.
Squash it with 48 please.
BR,
Krzysztof
>
> Signed-off-by: Lukasz Luba <l.luba@...tner.samsung.com>
> ---
> arch/arm/boot/dts/exynos5800.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi
> index 57d3b319fd65..3b9200db43b6 100644
> --- a/arch/arm/boot/dts/exynos5800.dtsi
> +++ b/arch/arm/boot/dts/exynos5800.dtsi
> @@ -131,3 +131,13 @@
> &mfc {
> compatible = "samsung,mfc-v8";
> };
> +
> +&soc {
> + bus_isp266: bus_isp266 {
> + compatible = "samsung,exynos-bus";
> + clocks = <&clock CLK_DOUT_ACLK266_ISP>;
> + clock-names = "bus";
> + operating-points-v2 = <&bus_gen_opp_table>;
> + status = "disabled";
> + };
> +};
> --
> 2.17.1
>
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