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Message-ID: <20190722220134.GA8281@bogus>
Date: Mon, 22 Jul 2019 16:01:34 -0600
From: Rob Herring <robh@...nel.org>
To: Manish Narani <manish.narani@...inx.com>
Cc: ulf.hansson@...aro.org, mark.rutland@....com, heiko@...ech.de,
michal.simek@...inx.com, adrian.hunter@...el.com,
christoph.muellner@...obroma-systems.com,
philipp.tomsich@...obroma-systems.com, viresh.kumar@...aro.org,
scott.branden@...adcom.com, ayaka@...lik.info, kernel@...il.dk,
tony.xie@...k-chips.com, rajan.vaja@...inx.com,
jolly.shah@...inx.com, nava.manne@...inx.com, mdf@...nel.org,
olof@...om.net, linux-mmc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH v2 07/11] dt-bindings: mmc: arasan: Add optional
properties for Arasan SDHCI
On Mon, Jul 01, 2019 at 10:59:47AM +0530, Manish Narani wrote:
> Add optional propeties for Arasan SDHCI which are used to set clk delays
> for different speed modes in the controller.
>
> Signed-off-by: Manish Narani <manish.narani@...inx.com>
> ---
> Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> index 7c79496..7425d52 100644
> --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> @@ -49,6 +49,21 @@ Optional Properties:
> properly. Test mode can be used to force the controller to function.
> - xlnx,int-clock-stable-broken: when present, the controller always reports
> that the internal clock is stable even when it is not.
> + - clk-phase-legacy: Input/Output Clock Delay pair in degrees for Legacy Mode.
> + - clk-phase-mmc-hs: Input/Output Clock Delay pair degrees for MMC HS.
> + - clk-phase-sd-hs: Input/Output Clock Delay pair in degrees for SD HS.
> + - clk-phase-uhs-sdr12: Input/Output Clock Delay pair in degrees for SDR12.
> + - clk-phase-uhs-sdr25: Input/Output Clock Delay pair in degrees for SDR25.
> + - clk-phase-uhs-sdr50: Input/Output Clock Delay pair in degrees for SDR50.
> + - clk-phase-uhs-sdr104: Input/Output Clock Delay pair in degrees for SDR104.
> + - clk-phase-uhs-ddr50: Input/Output Clock Delay pair in degrees for SD DDR50.
> + - clk-phase-mmc-ddr52: Input/Output Clock Delay pair in degrees for MMC DDR52.
> + - clk-phase-mmc-hs200: Input/Output Clock Delay pair in degrees for MMC HS200.
> + - clk-phase-mmc-hs400: Input/Output Clock Delay pair in degrees for MMC HS400.
Either these need vendor prefixes or be added as common properties if
that makes sense.
Rob
> +
> + Above mentioned are the clock (phase) delays which are to be configured in the
> + controller while switching to particular speed mode. If not specified, driver
> + will configure the default value defined for particular mode in it.
>
> Example:
> sdhci@...00000 {
> --
> 2.1.1
>
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