linux-kernel - Re: [PATCH V5 3/5] arm64: dts: imx8mm: Add system counter node

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Message-ID: <20190722031517.GT3738@dragon>
Date:   Mon, 22 Jul 2019 11:15:18 +0800
From:   Shawn Guo <shawnguo@...nel.org>
To:     Anson.Huang@....com
Cc:     catalin.marinas@....com, will@...nel.org, robh+dt@...nel.org,
        mark.rutland@....com, s.hauer@...gutronix.de,
        kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
        daniel.lezcano@...aro.org, tglx@...utronix.de,
        leonard.crestez@....com, aisheng.dong@....com,
        daniel.baluta@....com, ping.bai@....com, l.stach@...gutronix.de,
        abel.vesa@....com, andrew.smirnov@...il.com, ccaione@...libre.com,
        angus@...ea.ca, agx@...xcpu.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH V5 3/5] arm64: dts: imx8mm: Add system counter node

On Wed, Jul 10, 2019 at 02:30:54PM +0800, Anson.Huang@....com wrote:
> From: Anson Huang <Anson.Huang@....com>
> 
> Add i.MX8MM system counter node to enable timer-imx-sysctr
> broadcast timer driver.
> 
> Signed-off-by: Anson Huang <Anson.Huang@....com>

Do I need to wait for patch #1 landing before I apply #3 ~ #5, or can
they be applied independently (no breaking on anything)?

Shawn

> ---
> Changes since V4:
> 	- update the clock info using fixed clock node;
> 	- correct the reg range;
> 	- update the interrupt number as the system counter driver ONLY uses 1 irq now.
> ---
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index b5637f8..8cf7f34 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -560,6 +560,14 @@
>  				#pwm-cells = <2>;
>  				status = "disabled";
>  			};
> +
> +			system_counter: timer@...a0000 {
> +				compatible = "nxp,sysctr-timer";
> +				reg = <0x306a0000 0x20000>;
> +				interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&osc_24m>;
> +				clock-names = "per";
> +			};
>  		};
>  
>  		aips3: bus@...00000 {
> -- 
> 2.7.4
>