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Message-Id: <20190730184256.30338-13-helen.koike@collabora.com>
Date: Tue, 30 Jul 2019 15:42:54 -0300
From: Helen Koike <helen.koike@...labora.com>
To: linux-rockchip@...ts.infradead.org
Cc: devicetree@...r.kernel.org, eddie.cai.linux@...il.com,
mchehab@...nel.org, heiko@...ech.de, jacob2.chen@...k-chips.com,
jeffy.chen@...k-chips.com, zyc@...k-chips.com,
linux-kernel@...r.kernel.org, tfiga@...omium.org,
hans.verkuil@...co.com, laurent.pinchart@...asonboard.com,
sakari.ailus@...ux.intel.com, kernel@...labora.com,
ezequiel@...labora.com, linux-media@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, zhengsq@...k-chips.com,
Helen Koike <helen.koike@...labora.com>
Subject: [PATCH v8 12/14] arm64: dts: rockchip: add isp0 node for rk3399
From: Shunqian Zheng <zhengsq@...k-chips.com>
rk3399 have two ISP, but we havn't test isp1, so just add isp0 at present.
Signed-off-by: Shunqian Zheng <zhengsq@...k-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@...k-chips.com>
[update for upstream]
Signed-off-by: Helen Koike <helen.koike@...labora.com>
---
Changes in v8: None
Changes in v7:
- add phy properties
- add ports
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 25 ++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index cede1ad81be2..776d2bd48c06 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1698,6 +1698,31 @@
status = "disabled";
};
+ isp0: isp0@...10000 {
+ compatible = "rockchip,rk3399-cif-isp";
+ reg = <0x0 0xff910000 0x0 0x4000>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru SCLK_ISP0>,
+ <&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
+ <&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
+ clock-names = "clk_isp",
+ "aclk_isp", "aclk_isp_wrap",
+ "hclk_isp", "hclk_isp_wrap";
+ power-domains = <&power RK3399_PD_ISP0>;
+ iommus = <&isp0_mmu>;
+ phys = <&mipi_dphy_rx0>;
+ phy-names = "dphy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+ };
+ };
+
isp0_mmu: iommu@...14000 {
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
--
2.22.0
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