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Message-ID: <f4fbbf48-a301-9d87-02cb-eb6327257a6c@intel.com>
Date: Tue, 30 Jul 2019 13:10:08 -0700
From: Reinette Chatre <reinette.chatre@...el.com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: fenghua.yu@...el.com, bp@...en8.de, tony.luck@...el.com,
kuo-lang.tseng@...el.com, mingo@...hat.com, hpa@...or.com,
x86@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2 00/10] x86/CPU and x86/resctrl: Support pseudo-lock
regions spanning L2 and L3 cache
Hi Thomas,
On 7/30/2019 1:00 PM, Thomas Gleixner wrote:
> On Tue, 30 Jul 2019, Reinette Chatre wrote:
>> Patches 2 to 8 to the resctrl subsystem are preparing for the new feature
>> and should result in no functional change, but some comments do refer to
>> the new feature. Support for pseudo-locked regions spanning L2 and L3 cache
>> is introduced in patches 9 and 10.
>>
>> Your feedback will be greatly appreciated.
>
> I've already skimmed V1 and did not find something horrible, but I want to
> hand the deeper review off to Borislav who should return from his well
> earned vacation soon.
Thank you very much. I look forward to working with Borislav on his return.
Reinette
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