linux-kernel - Re: [PATCH 1/2 v4] MIPS: Ingenic: Fix bugs when detecting X1000's L2 cache.

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Date:   Tue, 6 Aug 2019 23:02:03 +0000
From:   Paul Burton <paul.burton@...s.com>
To:     Zhou Yanjie <zhouyanjie@...o.com>
CC:     "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "ralf@...ux-mips.org" <ralf@...ux-mips.org>,
        "paul@...pouillou.net" <paul@...pouillou.net>,
        Paul Burton <pburton@...ecomp.com>,
        "jhogan@...nel.org" <jhogan@...nel.org>,
        "malat@...ian.org" <malat@...ian.org>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "allison@...utok.net" <allison@...utok.net>,
        "syq@...ian.org" <syq@...ian.org>,
        "chenhc@...ote.com" <chenhc@...ote.com>,
        "jiaxun.yang@...goat.com" <jiaxun.yang@...goat.com>,
        "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>
Subject: Re: [PATCH 1/2 v4] MIPS: Ingenic: Fix bugs when detecting X1000's L2
  cache.

Hello,

Zhou Yanjie wrote:
> 1.fix bugs when detecting L2 cache sets value.
> 2.fix bugs when detecting L2 cache ways value.

Series applied to mips-next.

Thanks,
    Paul

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