linux-kernel - Re: [PATCH 11/16] net: phy: adin: PHY reset mechanisms

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <149db19df9517acf81529c726d74b594f40272b1.camel@analog.com>
Date:   Tue, 6 Aug 2019 06:50:55 +0000
From:   "Ardelean, Alexandru" <alexandru.Ardelean@...log.com>
To:     "andrew@...n.ch" <andrew@...n.ch>
CC:     "davem@...emloft.net" <davem@...emloft.net>,
        "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "f.fainelli@...il.com" <f.fainelli@...il.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>
Subject: Re: [PATCH 11/16] net: phy: adin: PHY reset mechanisms

On Mon, 2019-08-05 at 17:15 +0200, Andrew Lunn wrote:
> [External]
> 
> On Mon, Aug 05, 2019 at 07:54:48PM +0300, Alexandru Ardelean wrote:
> > The ADIN PHYs supports 4 types of reset:
> > 1. The standard PHY reset via BMCR_RESET bit in MII_BMCR reg
> > 2. Reset via GPIO
> > 3. Reset via reg GeSftRst (0xff0c) & reload previous pin configs
> > 4. Reset via reg GeSftRst (0xff0c) & request new pin configs
> > 
> > Resets 2 & 4 are almost identical, with the exception that the crystal
> > oscillator is available during reset for 2.
> > 
> > Resetting via GeSftRst or via GPIO is useful when doing a warm reboot. If
> > doing various settings via phytool or ethtool, the sub-system registers
> > don't reset just via BMCR_RESET.
> > 
> > This change implements resetting the entire PHY subsystem during probe.
> > During PHY HW init (phy_hw_init() logic) the PHY core regs will be reset
> > again via BMCR_RESET. This will also need to happen during a PM resume.
> 
> phylib already has support for GPIO reset. So if possible, you should
> not repeat that code here.
> 
> What is the difference between a GPIO reset, and a GPIO reset followed
> by a subsystem soft reset?

there shouldn't be any difference;
it's just 2 consecutive resets;
i'll take a closer look at phylib's GPIO reset and see

> 
>    Andrew