linux-kernel - RE: [PATCH V5 1/5] clocksource: imx-sysctr: Add internal clock divider handle

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Message-ID: <DB3PR0402MB3916B06E8907604A71169063F5D50@DB3PR0402MB3916.eurprd04.prod.outlook.com>
Date:   Tue, 6 Aug 2019 01:55:32 +0000
From:   Anson Huang <anson.huang@....com>
To:     "catalin.marinas@....com" <catalin.marinas@....com>,
        "will@...nel.org" <will@...nel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "festevam@...il.com" <festevam@...il.com>,
        dl-linux-imx <linux-imx@....com>,
        "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        Leonard Crestez <leonard.crestez@....com>,
        Aisheng Dong <aisheng.dong@....com>,
        Daniel Baluta <daniel.baluta@....com>,
        Jacky Bai <ping.bai@....com>,
        "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
        Abel Vesa <abel.vesa@....com>,
        "andrew.smirnov@...il.com" <andrew.smirnov@...il.com>,
        "ccaione@...libre.com" <ccaione@...libre.com>,
        "angus@...ea.ca" <angus@...ea.ca>,
        "agx@...xcpu.org" <agx@...xcpu.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
CC:     dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH V5 1/5] clocksource: imx-sysctr: Add internal clock
 divider handle

Gentle ping...

> From: Anson Huang <Anson.Huang@....com>
> 
> The system counter block guide states that the base clock is internally divided
> by 3 before use, that means the clock input of system counter defined in DT
> should be base clock which is normally from OSC, and then internally divided
> by 3 before use.
> 
> Signed-off-by: Anson Huang <Anson.Huang@....com>
> ---
> Changes since V4:
> 	- to solve the clock driver probed after system counter driver issue,
> now we can easily switch to
> 	  use fixed clock defined in DT and get its rate, then divided by 3 to
> get real clock rate for
> 	  system counter driver, no need to add "clock-frequency" property in
> DT.
> ---
>  drivers/clocksource/timer-imx-sysctr.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/clocksource/timer-imx-sysctr.c
> b/drivers/clocksource/timer-imx-sysctr.c
> index fd7d680..b7c80a3 100644
> --- a/drivers/clocksource/timer-imx-sysctr.c
> +++ b/drivers/clocksource/timer-imx-sysctr.c
> @@ -20,6 +20,8 @@
>  #define SYS_CTR_EN		0x1
>  #define SYS_CTR_IRQ_MASK	0x2
> 
> +#define SYS_CTR_CLK_DIV		0x3
> +
>  static void __iomem *sys_ctr_base;
>  static u32 cmpcr;
> 
> @@ -134,6 +136,9 @@ static int __init sysctr_timer_init(struct device_node
> *np)
>  	if (ret)
>  		return ret;
> 
> +	/* system counter clock is divided by 3 internally */
> +	to_sysctr.of_clk.rate /= SYS_CTR_CLK_DIV;
> +
>  	sys_ctr_base = timer_of_base(&to_sysctr);
>  	cmpcr = readl(sys_ctr_base + CMPCR);
>  	cmpcr &= ~SYS_CTR_EN;
> --
> 2.7.4