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Message-ID: <20190812042435.25102-2-Zhiqiang.Hou@nxp.com>
Date: Mon, 12 Aug 2019 04:22:16 +0000
From: "Z.q. Hou" <zhiqiang.hou@....com>
To: "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
"jingoohan1@...il.com" <jingoohan1@...il.com>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
Leo Li <leoyang.li@....com>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>
CC: "M.h. Lian" <minghuan.lian@....com>,
"Z.q. Hou" <zhiqiang.hou@....com>
Subject: [PATCH 1/4] dt-bingings: PCI: Remove the num-lanes from Required
properties
From: Hou Zhiqiang <Zhiqiang.Hou@....com>
The num-lanes is not a mandatory property, e.g. on FSL
Layerscape SoCs, the PCIe link training is completed
automatically base on the selected SerDes protocol, it
doesn't need the num-lanes to set-up the link width.
It has been added in the Optional properties. This
patch is to remove it from the Required properties.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
---
Documentation/devicetree/bindings/pci/designware-pcie.txt | 1 -
1 file changed, 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index 5561a1c060d0..bd880df39a79 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -11,7 +11,6 @@ Required properties:
the ATU address space.
(The old way of getting the configuration address space from "ranges"
is deprecated and should be avoided.)
-- num-lanes: number of lanes to use
RC mode:
- #address-cells: set to <3>
- #size-cells: set to <2>
--
2.17.1
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