linux-kernel - Re: [PATCH 1/2] powerpc: Allow flush_icache

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Message-Id: <72a3fca157a508a9f1bc6ea20801b9227d788f1d.camel@au1.ibm.com>
Date:   Mon, 12 Aug 2019 11:19:49 +1000
From:   "Alastair D'Silva" <alastair@....ibm.com>
To:     Christophe Leroy <christophe.leroy@....fr>
Cc:     stable@...r.kernel.org,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Paul Mackerras <paulus@...ba.org>,
        Michael Ellerman <mpe@...erman.id.au>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] powerpc: Allow flush_icache_range to work across
 ranges >4GB

On Fri, 2019-08-09 at 10:59 +0200, Christophe Leroy wrote:
> 
> Le 09/08/2019 à 02:45, Alastair D'Silva a écrit :
> > From: Alastair D'Silva <alastair@...ilva.org>
> > 
> > When calling flush_icache_range with a size >4GB, we were masking
> > off the upper 32 bits, so we would incorrectly flush a range
> > smaller
> > than intended.
> > 
> > This patch replaces the 32 bit shifts with 64 bit ones, so that
> > the full size is accounted for.
> > 
> > Heads-up for backporters: the old version of flush_dcache_range is
> > subject to a similar bug (this has since been replaced with a C
> > implementation).
> 
> Can you submit a patch to stable, explaining this ?
> 

This patch was sent to stable too - or did you mean send another patch
for the stable asm version of flush_dcache_range?

-- 
Alastair D'Silva
Open Source Developer
Linux Technology Centre, IBM Australia
mob: 0423 762 819