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Message-ID: <d481e068-5688-d507-b78c-c927ce7a70d3@c-s.fr>
Date:   Mon, 12 Aug 2019 07:41:25 +0200
From:   Christophe Leroy <christophe.leroy@....fr>
To:     Alastair D'Silva <alastair@....ibm.com>
Cc:     stable@...r.kernel.org,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Paul Mackerras <paulus@...ba.org>,
        Michael Ellerman <mpe@...erman.id.au>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] powerpc: Allow flush_icache_range to work across
 ranges >4GB



Le 12/08/2019 à 03:19, Alastair D'Silva a écrit :
> On Fri, 2019-08-09 at 10:59 +0200, Christophe Leroy wrote:
>>
>> Le 09/08/2019 à 02:45, Alastair D'Silva a écrit :
>>> From: Alastair D'Silva <alastair@...ilva.org>
>>>
>>> When calling flush_icache_range with a size >4GB, we were masking
>>> off the upper 32 bits, so we would incorrectly flush a range
>>> smaller
>>> than intended.
>>>
>>> This patch replaces the 32 bit shifts with 64 bit ones, so that
>>> the full size is accounted for.
>>>
>>> Heads-up for backporters: the old version of flush_dcache_range is
>>> subject to a similar bug (this has since been replaced with a C
>>> implementation).
>>
>> Can you submit a patch to stable, explaining this ?
>>
> 
> This patch was sent to stable too - or did you mean send another patch
> for the stable asm version of flush_dcache_range?
> 

Yes I meant a patch for your 'heads-up', in extenso a patch for fixing 
flush_dcache_range().

And for this patch, you put stable is copy of the mail, but for it to be 
taken into account it needs to also explicitely include a Cc: 
stable@...r.kernel.org in the commit message. I guess Michael will add 
it for this time.

Christophe

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