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Message-ID: <3aee7eaf-d8c0-f10e-c954-8a50b5932b91@gmail.com>
Date:   Mon, 12 Aug 2019 19:44:55 +0300
From:   Dmitry Osipenko <digetx@...il.com>
To:     Thierry Reding <thierry.reding@...il.com>,
        Jonathan Hunter <jonathanh@...dia.com>
Cc:     linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] ARM: dts: tegra124: nyan-big: Add timings for RAM
 codes 4 and 6

23.07.2019 6:37, Dmitry Osipenko пишет:
> Add timings for RAM codes 4 and 6 and a timing for 528mHz of RAM code 1,
> which was missed due to the clock driver bug that is fixed now in all of
> stable kernels.
> 
> Tested-by: Steev Klimaszewski <steev@...i.org>
> Signed-off-by: Dmitry Osipenko <digetx@...il.com>

Friendly ping :)

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