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Message-ID: <20191029132946.GF508460@ulmo>
Date: Tue, 29 Oct 2019 14:29:46 +0100
From: Thierry Reding <thierry.reding@...il.com>
To: Dmitry Osipenko <digetx@...il.com>
Cc: Jonathan Hunter <jonathanh@...dia.com>,
linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] ARM: dts: tegra124: nyan-big: Add timings for RAM
codes 4 and 6
On Tue, Jul 23, 2019 at 06:37:44AM +0300, Dmitry Osipenko wrote:
> Add timings for RAM codes 4 and 6 and a timing for 528mHz of RAM code 1,
> which was missed due to the clock driver bug that is fixed now in all of
> stable kernels.
>
> Tested-by: Steev Klimaszewski <steev@...i.org>
> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
> ---
>
> Changelog:
>
> v2: Improved commit's message a tad.
>
> arch/arm/boot/dts/tegra124-nyan-big-emc.dtsi | 7917 ++++++++++++++----
> 1 file changed, 6272 insertions(+), 1645 deletions(-)
Applied to for-5.5/arm/dt, thanks.
Thierry
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