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Message-ID: <AM5PR04MB32993CC1344DD660A298C7E1F5D20@AM5PR04MB3299.eurprd04.prod.outlook.com>
Date: Tue, 13 Aug 2019 07:39:48 +0000
From: Xiaowei Bao <xiaowei.bao@....com>
To: Kishon Vijay Abraham I <kishon@...com>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"M.h. Lian" <minghuan.lian@....com>,
Mingkai Hu <mingkai.hu@....com>, Roy Zang <roy.zang@....com>,
"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
"tpiepho@...inj.com" <tpiepho@...inj.com>,
Leonard Crestez <leonard.crestez@....com>,
"andrew.smirnov@...il.com" <andrew.smirnov@...il.com>,
"yue.wang@...ogic.com" <yue.wang@...ogic.com>,
"hayashi.kunihiko@...ionext.com" <hayashi.kunihiko@...ionext.com>,
"dwmw@...zon.co.uk" <dwmw@...zon.co.uk>,
"jonnyc@...zon.com" <jonnyc@...zon.com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: RE: [EXT] Re: [PATCHv5 1/2] PCI: layerscape: Add the bar_fixed_64bit
property in EP driver.
> -----Original Message-----
> From: Kishon Vijay Abraham I <kishon@...com>
> Sent: 2019年8月13日 15:30
> To: Xiaowei Bao <xiaowei.bao@....com>; lorenzo.pieralisi@....com;
> bhelgaas@...gle.com; M.h. Lian <minghuan.lian@....com>; Mingkai Hu
> <mingkai.hu@....com>; Roy Zang <roy.zang@....com>;
> l.stach@...gutronix.de; tpiepho@...inj.com; Leonard Crestez
> <leonard.crestez@....com>; andrew.smirnov@...il.com;
> yue.wang@...ogic.com; hayashi.kunihiko@...ionext.com;
> dwmw@...zon.co.uk; jonnyc@...zon.com; linux-pci@...r.kernel.org;
> linux-kernel@...r.kernel.org; linuxppc-dev@...ts.ozlabs.org;
> linux-arm-kernel@...ts.infradead.org
> Subject: [EXT] Re: [PATCHv5 1/2] PCI: layerscape: Add the bar_fixed_64bit
> property in EP driver.
>
> Caution: EXT Email
>
> On 13/08/19 11:58 AM, Xiaowei Bao wrote:
> > The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1 is
> > 32bit, BAR2 and BAR4 is 64bit, this is determined by hardware, so set
> > the bar_fixed_64bit with 0x14.
> >
> > Signed-off-by: Xiaowei Bao <xiaowei.bao@....com>
>
> Acked-by: Kishon Vijay Abraham I <kishon@...com>
> > ---
> > v2:
> > - Replace value 0x14 with a macro.
> > v3:
> > - No change.
> > v4:
> > - send the patch again with '--to'.
> > v5:
> > - fix the commit message.
> >
> > drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > index be61d96..ca9aa45 100644
> > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > @@ -44,6 +44,7 @@ static const struct pci_epc_features
> ls_pcie_epc_features = {
> > .linkup_notifier = false,
> > .msi_capable = true,
> > .msix_capable = false,
> > + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
> > };
> >
> > static const struct pci_epc_features*
I check other platforms, it is 'static const struct pci_epc_features', I can get the correct
Value use this define way in pci-epf-test.c file.
> >
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